Jorge R. Fernandes

Recent advances in IR-UWB transceivers: An overview

Modern Ultra-Wide Band (UWB) regulations have recently been adopted worldwide allowing for unlicensed operation within 3.1 and 10.6 GHz, using an appropriate wideband signal format with a low Effective Isotropic Radiated Power (EIRP) level. UWB characteristics are suitable to transmit data using pulses instead of continuous-waves such as in narrowband radio links. It has the potential to be the right technology for high data-rate, low-power and short-to-medium range communication systems. We will focus on Impulse Radio-UWB (IR-UWB) systems and show their suitability for many different applications, including sensor networks, ad-hoc networks, cognitive radio, home networking, etc. We will also discuss the difficulties and challenges of designing IR-UWB systems. We present a tutorial overview of UWB regulations and usable signals. We present the existing standards and recommendations, and we review recently published results, highlighting trends in UWB transceiver power consumption and the impact of CMOS scaling on performance.

An Ultra-Low-Power interference-robust IR-UWB transceiver chipset using self-synchronizing OOK modulation

Impulse Radio-UWB (IR-UWB) is actively being researched as a low cost wireless technology for Ultra Low Power (ULP), low data-rate, short-range wireless links in tagging [1], sensing and medical applications. In current solutions efficient timing acquisition as well as Narrow-Band Interference (NBI) rejection requires complex or large analog and digital circuits [2–4]. In this work, we introduce an IR-UWB architecture with very high NBI rejection and present a low complexity and low power timing synchronization and demodulation technique while achieving excellent link performance.

An Ultra-Wideband Impulse-Radio Transceiver Chipset Using Synchronized-OOK Modulation

This work presents a low-complexity IR-UWB chipset which achieves synchronization and demodulation at the receiver relying only on a ring oscillator clock. The modulation scheme used, synchronized-OOK (S-OOK), permits low power timing acquisition and data reception with a static CMOS digital synchronizer and demodulator counting 61 logic elements. The receiver consists of a modified energy detector (ED) that allows to asynchronously receive UWB pulses in presence of narrowband interference (NBI) with power levels up to -5 and -16 dBm for 5.4 and 2.4 GHz continuous wave interfering signals respectively. The sensitivity is -60/ -66 dBm with an overall energy dissipation of 2.9/3.9 nJ/bit for a 1 Mbps S-OOK PRBS data stream and a 100% power duty cycle. The complete demodulation and synchronization digital back-end consumes only 0.2 mW (including on-chip output buffers) during normal operation. The IR-UWB transmitter is based on a gated LC oscillator and achieves pulse durations of ~2 ns for bandwidths of 500 MHz. It consumes 249 pJ/bit energy per bit at 1 Mbps OOK.

Analysis and Design of Quadrature Oscillators

The following are some features of Analysis and Design of Quadrature Oscillators make it different from the existing literature on electronic oscillators: (1) focus on quadrature oscillators with accurate quadrature and low phase-noise, required by modern communication systems; (2) a detailed comparative study of quadrature LC and RC oscillators, including cross-coupled LC quasi-sinusoidal oscillators, cross-coupled RC relaxation oscillators, a quadrature RC oscillator-mixer, and two-integrator oscillators; (3) a thorough investigation of the effect of mismatches on the phase-error and the phase-noise; (4) the conclusion that quadrature RC oscillators can be a practical alternative to LC oscillators when area and cost should be minimized (in cross-coupled RC oscillators both the quadrature-error and phase-noise are reduced, whereas in LC oscillators the coupling increases the phase-noise.

A Pulse Generator for UWB-IR Based on a Relaxation Oscillator

We propose the adaptation of a well-known relaxation oscillator to produce a modulated Gaussian pulse suitable for ultra-wide-band (UWB) impulse radio (IR). The proposed circuit has low area and low power consumption, can easily be modulated by a digital signal, and requires no special technology options; these features make it suitable for UWB-IR low-cost applications. The circuit behavior is confirmed by simulation and by experimental results on a prototype designed in austriamicrosystems 0.35-mum SiGe-BiCMOS technology.

Techniques for Dual-Band LNA Design using Cascode Switching and Inductor Magnetic Coupling

In the last years we have assisted to a great development of wireless receivers working in narrow frequency bands. Nowadays, this development goes towards more flexible wireless receivers which accommodate different wireless applications - wide-band and multi-band receivers. In this paper we study techniques suitable for the design of dual-band CMOS low noise amplifiers (LNA), based on cascode switching and inductor magnetic coupling. Two LNA topologies were evaluated and implemented in a 0.35mum CMOS process. A proof of concept, a prototype of a proposed dual-band CMOS LNA was designed to work simultaneously at 0.9 GHz and 1.8 GHz. It uses a voltage supply of 2.4 V consuming 4.8 mA

Integration of Magnetoresistive Biochips on a CMOS Circuit

Since 2006, fully scalable matrix-based magnetoresistive biochips have been proposed. This integration was initially achieved with thin film switching devices and moved to complementary metal-oxide-semiconductor (CMOS) switching devices and electronics. In this paper, a new microfabrication process is proposed to integrate magnetoresistive sensors on a small CMOS chip (4 mm2). This chip includes a current generator, multiplexers, and a diode in series with a spin valve as matrix element. In this configuration, it is shown that the fabricated spin-valves have similar magnetic characteristics when compared to standalone spin valves. This validates the successfulness of the developed microfabrication process. The noise of each matrix element is further characterized and compared to the noise of a standalone spin valve and a portable electronic platform designed to perform biological assays. Although the noise is still higher, the spin valve integrated on the CMOS chip enables an increase in density and compactness of the measuring electronics.

The Effect of Mismatches and Delay on the Quadrature Error of a Cross-Coupled Relaxation Oscillator

Cross-coupled relaxation oscillators can produce two highly accurate quadrature output signals (Verhoeven, 1992). We present a high-level model of these oscillators in terms of circuit parameters, from which we obtain explicit equations for duty-cycle, oscillation frequency, and quadrature error. They show the influence on the oscillator performance of component mismatches and other nonideal effects, such as delays. The results provide useful guidelines for the design of high performance oscillators. The theoretical results are confirmed by simulation and by measurements on a test chip.

An 8-bit 0.35-V 5.04-fJ/Conversion-Step SAR ADC With Background Self-Calibration of Comparator Offset

This paper reports a successive approximation register (SAR) analog-to-digital converter (ADC) based on the charge-sharing principle, which is known to be very energy efficient, but susceptible to the comparator offset. The ADC uses a new background calibration technique to cancel out the comparator mismatch and improve ADC linearity. Operation under low voltages is obtained through the use of voltage-boosted switches in the track-and-hold and the digitalto-analog converter. The techniques are demonstrated on a low-voltage low-power SAR ADC that operates from a minimum supply voltage of 350 up to 600 mV, suitable for circuits supplied by power harvesters. The prototype fabricated in a 130-nm CMOS process employs only regular-VTH transistors. It is able to convert at 3 MSps when supplied by 600 mV and at 200 kSps when supplied by 350 mV. At 350 mV, the measured effective-number-of-bits is 6.4, leading to a figure-of-merit of 5.04 fJ/conversion-step.

Experimental Evaluation of Phase-Noise and Quadrature Error in a CMOS 2.4 GHz Relaxation Oscillator

Contrary to what happens with LC oscillators, the increase of coupling in cross-coupled relaxation RC-oscillators leads to a lower quadrature error and lower phase-noise. We present a 2.4 GHz CMOS quadrature relaxation oscillator, and show the measurements confirming this property. Increasing the coupling block gain, the oscillator phase-noise is reduced from -97 dBc/Hz to -104 dBc/Hz @ 1 MHz. The quadrature error is reduced from 4.3deg to 0.8deg. These results show that RC quadrature oscillators may be a practical alternative for RF transceiver applications.