José Ignacio Hidalgo

A hybrid heuristic for the traveling salesman problem

The combination of genetic and local search heuristics has been shown to be an effective approach to solving the traveling salesman problem (TSP). This paper describes a new hybrid algorithm that exploits a compact genetic algorithm in order to generate high-quality tours, which are then refined by means of the Lin-Kernighan (LK) local search. The local optima found by the LK local search are in turn exploited by the evolutionary part of the algorithm in order to improve the quality of its simulated population. The results of several experiments conducted on different TSP instances with up to 13,509 cities show the efficacy of the symbiosis between the two heuristics.

Functional partitioning for hardware-software codesign using genetic algorithms

Hardware-software partitioning is one of the most important issues of codesign of embedded systems because it is made at the beginning of the cycle of design. In terms of costs and delays, final results will strongly depend on partitioning. In this work we address the functional partitioning problem of hardware-software codesign using a genetic algorithm. Experimental results includes a comparative study with three algorithms: simulated annealing, Fiduccia-Matheyses and a modified version of this with an improvement of results.

Adaptive Task Migration Policies for Thermal Control in MPSoCs

In deep submicron circuits, high temperatures have created critical issues in reliability, timing, performance, coolings costs and leakage power. Task migration techniques have been proposed to manage efficiently the thermal distribution in multi-processor systems but at the cost of important performance penalties. While traditional techniques have focused on reducing the average temperature of the chip, they have not considered the effect that temperature gradients have in system reliability. In this work, we explore the benefits of thermal-aware task migration techniques for embedded multi-processor systems. We propose several policies that are able to reduce the average temperature of the chip and the thermal gradients with a negligible performance overhead. With our techniques, hot spots and temperature gradients are decreased up to 30% with respect to state-of-the-art thermal management approaches.

A parallel compact genetic algorithm for multi-FPGA partitioning

In this paper we investigate the design of a compact genetic algorithm to solve multi-FPGA partitioning problems. Nowadays Multi-FPGA systems are used for a great variety of applications such as dynamically reconfigurable hardware applications, digital circuit emulation, and numerical computation. Both a sequential and a parallel version of a compact genetic algorithm (cGA) have been designed and implemented on a cluster of workstations. The peculiarities of the cGA permits to save memory in order to address large multi-FPGA partitioning problems, while the exploitation of parallelism allows to reduce execution times. The good results achieved on several experiments conducted on different multi-FPGA partitioning instances show that this solution is viable to solve multi-FPGA partitioning problems.

Hybrid parallelization of a compact genetic algorithm

Genetic algorithms (GAs) are stochastic optimization heuristics in which searches in solution space are carried out by imitating the population genetics stated in Darwins theory of evolution. We have focused this work on compact genetic algorithms (cGAs), which unlike standard GAs do not manage a population of solutions but only mimics its existence. We study several approaches that can be used to implement parallel cGAs in order to reduce the execution times and to improve the quality of the solutions reached by increasing population sizes. The parallelization models adopted to implement GAs can be classified as: centralized, global, fine grained and coarse grained. For a cGA, only the two first models can be applied. Our approach consists of a hybrid model which combines both centralized and global implementations. The cGA incorporates a local search method and has been applied for solving a graph-partitioning problem for solving the Multi-FPGA systems partitioning and placement.

Partitioning and placement for multi-FPGA systems using genetic algorithms

One of the most important and difficult tasks in multi-FPGA systems design is partitioning. The main problems are related to the I/O pins and logic capacity of FPGAs. The number of pins available is a critical problem, because FPGA devices have such a reduced number of them compared with their logic capacity. In addition we must reserve some of the pins to interconnect parts of the circuit placed on non-adjacent FPGAs. Most of the previous works have been adapted from other VLSI areas, and hence, they disregard the specific features of these kind of circuit. A new method for solving the partitioning and placement problem in multi-FPGA systems is presented. We use graph theory to describe the circuit, then a classical genetic algorithm (GA) is applied with a problem-specific encoding. The algorithm preserves the original structure of the circuit and by means of a fuzzy technique it evaluates the I/O-pins consumption due to direct and indirect connections between FPGAs. We have used the Partitioning93 benchmarks described with the Xilinx Netlist Format (XNF). The results obtained show how genetic algorithms are capable of accomplishing successfully the partitioning and placement tasks while respecting the board constraints.

A parallel evolutionary algorithm for technical market indicators optimization

This paper deals with the optimization of parameters of technical indicators for stock market investment. Price prediction is a problem of great complexity and, usually, some technical indicators are used to predict market trends. The main difficulty in using technical indicators lies in deciding a set of parameter values. We proposed the use of Multi-Objective Evolutionary Algorithms (MOEAs) to obtain the best parameter values belonging to a collection of indicators that will help in the buying and selling of shares. The experimental results indicate that our MOEA offers a solution to the problem by obtaining results that improve those obtained through technical indicators with standard parameters. In order to reduce execution time is necessary to parallelize the executions. Parallelization results show that distributing the workload of indicators in multiple processors to improve performance is recommended. This parallelization has been performed taking advantage of the idle time in a corporate technology infrastructure. We have configured a small parallel grid using the students Labs of a Computer Science University College.

Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation

Embedded consumer devices are increasing their capabilities and can now implement new multimedia applications reserved only for powerful desktops a few years ago. These applications share complex and intensive dynamic memory use. Thus, dynamic memory optimizations are a requirement when porting these applications. Within these optimizations, the refinement of the Dynamically (de)allocated Data Type (or DDT) implementations is one of the most important and difficult parts for an efficient mapping onto low-power embedded devices. In this paper, we describe a new automatic optimization approach for the DDTs of object-oriented multimedia applications. It is based on an analytical pre-characterization of the possible elementary DDT blocks, and a multi-objective genetic algorithm to explore the design space and to select the best implementation according to different optimization criteria (i.e., memory accesses, memory footprint and energy consumption). Our results in real-life multimedia applications show that the best implementations of DDTs can be obtained in an automated way in few hours, while typically designers would require days to find a suitable implementation, achieving important savings in exploration time with respect to other state-of-the-art heuristics-based optimization methods for this task.

Balancing the computation effort in genetic algorithms

It is usually difficult to find a balance among some of the important parameters when using an evolutionary algorithm (EA) (number of runs, population size and generations) and at the same time saving computing time. Recently, some papers have dealt with population size and optimal numbers of populations, while others have instead focused on a different couple of parameters, and scarcely the three parameters have been considered simultaneously. In this paper we consider simultaneously all of them. Computing effort is used through experimental results section to evaluate the proposed alternatives. Experimental results confirm some conclusions obtained on previous works with only two parameters and also give some guidelines on the way of distributing efficiently resources when designing parallel implementations of EAs.

A Method for Model Parameter Identification Using Parallel Genetic Algorithms

In this paper we present a new approach for the model parameters identification problem of real time systems based on parallel genetic algorithms. The method has been applied to an specific problem such as the control movement of a high speed ship where parallelization allows us to achieve the time constraints. The algorithm has been developed using MPI and the experimental results has been obtained on an SGI Origin 2000.