José Luis Cura

A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems

This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 k/spl Omega/ transimpedance gain (20 THz/spl Omega/ gain-bandwidth product) with the targeted input photodiode junction capacitance of 10 pF. The input dynamic range is 60 dB, obtained through a switched step gain approach, and the input referred noise is under 8.2 pA//spl radic/Hz. An integrated circuit has been produced using a double poly, double metal, 0.8 /spl mu/m CMOS technology.

Dynamic range boosting for wireless optical receivers

This paper presents a dynamic range boosting technique for wireless optical receivers. This technique changes the feedback impedance of the transimpedance amplifier by the control of multiple parallel transistors in the triode region. This strategy results in a wide controllable gain amplifier, without extra signal-to-noise ratio penalties. A front-end with 20 MHz bandwidth, maximum transimpedance gain of 130 dB /spl Omega/ and a minimum dynamic range of 60 dB is implemented with this technique for wireless optical Ethernet and ATM applications.

A sectored receiver for infrared wireless networks

This paper presents an experimental sectored receiver for infrared wireless networks. The receiver comprises two sectors, each with a switched gain front-end and a signal-to-noise ratio estimator. These are then interconnected with a best-sector selector unit, able to compensate the gain switching characteristics of the front-ends. The circuit has been designed in a 0.8 /spl mu/m CMOS technology.

A high transimpedance-bandwidth, high dynamic range, CMOS front-end for open air optical links

A high transimpedance-bandwidth, high dynamic range, integrated CMOS amplifier is presented. This front-end circuit is specially designed for open air optical communications featuring a 50 MHz bandwidth with a dynamic range of 60 dB, due to the implemented automatic step gain control. The power consumption is around 70 mW and the input referred noise is smaller than 36 pA/sub rms/. The design approach is full custom based, using a double poly, double metal, 0.8 /spl mu/m CMOS technology.

Bandwidth improvements in transimpedance amplifiers for visible-light receiver front-ends

This paper analyzes a method for bandwidth improvement based on a gain-bandwidth boosting technique in transimpedance amplifiers. This method is suitable for visible light receiver front-ends employing large area photodiodes, where open loop voltage gain can be optimized according to the photodiode capacitance. Theoretical results, assuming a two-pole transfer function, are compared with simulation and measurement results, using the 350nm SiGe process from AMS. Achieved results show that using this approach it is possible to reach 50MHz of bandwidth and 10KΩ maximally flat transimpedance amplifier gain with a 50pF photodiode. Power consumption (10.2mW) and noise thermal floor (2pA/√Hz) were not significantly affected.

Folded-cascode transimpedance amplifiers employing a CMOS inverter as input stage

This paper presents the design and comparison of two shunt feedback transimpedance amplifiers (TIAs) implemented in standard 350nm CMOS technology from Austria Microsystems. These transimpedance amplifiers are based on a folded cascode topology. The first one is a conventional folded-cascode (CFC-TIA) and the second is a modified version folded-cascod (MFC-TIA) employing a CMOS inverter at the input stage. The proposed MFC-TIA achieves a gain of 80dBΩ, 370MHz bandwidth and minimum input current noise of 1,6pA√Hz with 0.5pF total input capacitance. The achieved results show that MFC-TIAs can match the performance of CFC-TIAs with reduced implementation area, thus being a suitable solution for photo-detector array receivers.

A multi-valued 350nm CMOS voltage reference

This paper describes, a voltage reference source using sub-threshold MOSFETs. The circuit supports supply voltages ranging from 1.5V to 3.3V and temperature variations ranging from -20°C to 80°C. Different values for the voltage reference can be achieved without severe performance impairments. The proposed circuit was produced in the 350nm CMOS process from AMS and occupies less than 0.0335mm2. Simulation and experimental data show that this circuit is able to achieve, a 3mV variation for the entire temperature span and a 2mV variation for the entire supply voltage span.

A new technique to achieve exact and controllable voltage gain relations in feedback amplifiers

This paper presents a new technique that allows the realization of exact voltage gain relations in feedback amplifiers. Basically, this technique exploits the imperfect subtraction characteristics of traditional differential amplifiers, as a means to nullify the closed-loop gain error of the complete configuration. The validation of the proposed technique was achieved following a simulation perspective, using a specially designed circuit, in a 350nm CMOS process. The achieved results show that it is possible to arbitrarily reduce the gain error, improving the control precision of the subtraction process.