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Dive into the research topics where José María Hinojo is active.

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Featured researches published by José María Hinojo.


intelligent networking and collaborative systems | 2010

A Wireless In-door System for Assisting Victims and Rescue Equipments in a Disaster Management

S. L. Toral; Federico Barrero; Francisco Cortés; D. G. Reina; E. Marsal; José María Hinojo; M. Soto

This paper presents a system based on electronic equipments, standard mobile phones and WLAN networks for managing evacuation routes, or for obtaining information about victims’ location and status, whenever a building collapses due to a disaster like earthquakes. The system is based on the standard Blue tooth specification to guarantee their application in indoor areas. The electronic equipments, their specifications and communication links, and the implications and viability of the entire system are analyzed in this work.


global communications conference | 2014

Experimental multiuser mobile optical communication using compressive sensing

Javier Perez-Ramirez; Elam Curry; Deva K. Borah; José María Hinojo

This paper presents a multiuser mobile optical wireless communication system that uses a single digital camera to receive signals transmitted by multiple users using light-emitting diode (LED) arrays. The key idea is to sample only the engaged camera pixels affected by the signals from the users. Toward this aim, image frames received during an acquisition phase are used to estimate the signal support of the users in the image plane using the orthogonal matching pursuit (OMP) algorithm in a compressed sensing framework. The detected signal support is then clustered and tracked using Kalman Filters. Both numerical methods and hardware experiments are used to validate the algorithms. The proposed system is found to provide excellent performance even for users with weak transmitted signals.


Archive | 2018

The Flipped Voltage Follower (FVF): An Alternative Topology for LDO Regulators

José María Hinojo; Clara Luján Martínez; A. Torralba

To overcome the limitations of the classical topology to build IC-LDO regulators, several authors have chosen alternative topologies. This is the case of the Flipped Voltage Follower cell (proposed by Ramirez-Angulo et al., ISCAS 2002), which meets the requirements of LDO regulators as a consequence of its low output impedance and good stability. The first use of this cell as part of a linear regulator due to Pulkin and Rincon-Mora (U.S. Patent No. 6,573,694, 2003), where the Cascode Flipped Voltage Follower cell was used as a buffer to drive the pass transistor. Later, this same cell was used in an LDO regulator as a power stage (Hazucha et al., JSSC 40(4), 2005). This chapter describes the FVF and CAFVF cells and their performances as an LDO regulator, highlighting their advantages and disadvantages when compared to the classical topology. Then, it offers a thorough review of the regulators presented in the literature that use the FVF family of cells. Finally, a new regulator is presented that improves the performances of CAFVF-based regulators both in regulation and transient response.


Archive | 2018

Ultra-Low Quiescent Power Consumption LDO Regulators

José María Hinojo; Clara Luján Martínez; A. Torralba

This chapter discusses challenges introduced by ultra-low power consumption in power management circuits. First of all, some techniques proposed in the literature to design ultra-low-power LDO regulators are reviewed. Then, an IC-LDO regulator with a quiescent current consumption lower than 600 nA is proposed. It is based on the classical LDO topology, which has been modified to include a class AB buffer between the output of the error amplifier and the gate of M\(_\mathrm{PASS}\). This way, a fast charge/discharge of its parasitic capacitance is achieved with the inherent low quiescent power consumption of class AB circuits. The proposed regulator has been fabricated in a standard 0.18 \(\upmu \)m CMOS technology. Experimental results show that the proposed regulator has a Figure of Merit in the state of the art.


Archive | 2018

Internally Compensated LDO Regulators

José María Hinojo; Clara Luján Martínez; A. Torralba

This chapter contains an introduction to Internally Compensated Low-Dropout (IC-LDO) regulators. The design of these circuits and the most used Figures of Merit (FOMs) to evaluate their performances are studied. Special attention is paid to three aspects of their design: (a) stability. In IC-LDO regulators, the dominant pole is located at an inner node, while the non-dominant pole, located at the output, is responsible for the degradation of the stability. Furthermore, it depends on the load condition, which complicates the design of a compensation network. (b) Transient response: The regulator load usually requires fast transient response to load current and input voltage variations, and (c) power supply ripple rejection. Perturbations in the input voltage cause undesired disturbances in the output voltage. This chapter discusses the techniques proposed in the literature to face these design challenges, with emphasis on low power solutions. In addition, and based on a set of selected figures of merit, a comparison of recently published LDO regulators is made at the end of the chapter.


Archive | 2018

Adaptive Continuous Resistor for Miller Compensation in IC-LDO Regulators

José María Hinojo; Clara Luján Martínez; A. Torralba

IC-LDO regulators are circuits that play a key role in modern power management and SoC design. They are required to occupy small area, operate with low power consumption and low supply voltage, and perform fast transient response and good load and line regulations. In addition, they must remain stable under extreme variations of the input voltage, load current and load capacitance. In this chapter, an adaptive and continuous compensation technique is proposed that tunes the value of the zero-nulling resistor of a classical Miller-based compensation to keep the nulling zero close to the Unit Gain Frequency (UGF), according to the working conditions. This technique has been applied to an LDO regulator based on a classical topology. Results of an implementation of such a regulator fabricated in a standard 65 nm CMOS technology are shown at the end of the chapter.


global communications conference | 2016

Optimal Symbol Set Design for Generalized Spatial Modulations in MIMO VLC Systems

Elam Curry; Deva K. Borah; José María Hinojo

This paper investigates optimal symbol set selection for the generalized spatial modulation (GSM) in visible light communication (VLC) systems. Realizing that the optimal search involves a highly complex combinatorial problem, a symbol set generation tree is proposed. The tree allows assessment of the system performance at each node and can be terminated early to obtain near-optimal solutions with reduced complexity. It is observed that the proposed optimal symbol search provides performance improvement of many dBs over results obtained with averaged random sets. The benefit of the optimized symbol set design is found to increase with increasing number of pulse amplitude modulation levels. Our contributions also include integration of possible rotations of the array in the mathematical model, and the demonstration of the results to be robust to channel changes due to rotations and shifting of the array in the image plane. Finally, the results are validated through hardware experimental results.


Microelectronics Journal | 2014

Internally compensated LDO regulator based on the cascoded FVF

José María Hinojo; Clara Isabel Lujan-Martinez; A. Torralba; J. Ramirez-Angulo


Archive | 2018

Internally Compensated LDO Regulators for Modern System-on-Chip Design

José María Hinojo; Clara Luján Martínez; A. Torralba


Etri Journal | 2017

FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

José María Hinojo; Clara Isabel Lujan-Martinez; A. Torralba; J. Ramirez-Angulo

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Deva K. Borah

New Mexico State University

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Elam Curry

New Mexico State University

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J. Ramirez-Angulo

New Mexico State University

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E. Marsal

University of Seville

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