José Vicente Calvano

Fault detection methodology and BIST method for 2nd order Butterworth, Chebyshev and Bessel filter approximations

This work proposes a new BIST scheme for 2nd order Butterworth, Chebyshev and Bessel filter approximations, using the transient analysis of simple input test vectors. A functional approach for fault modeling in 2nd order filters is presented and the transient response method is used for fault detection. The approach considers the filter as a 2nd order dynamic system where /spl omega/c and Qp deviations are faults to be detected. The peak time is the observed parameter that is evaluated in order to verify the filter correctness. The obtained results are very promising since all of /spl omega/c and Qp deviations as well as 100% of passive components are detected for this BIST scheme.

Functional test of field programmable analog arrays

In this work a strategy for testing analog networks, known as transient response analysis method, is applied to test the configurable analog blocks (CABs) of field programmable analog arrays (FPAAs). In this method the circuit under test (CUT) is programmed to implement first and second order blocks and the transient response of these blocks to known input stimuli is analyzed. Taking advantage of the inherent programmability of the FPAAs, a BIST-based scheme is used in order to obtain an error signal representing the difference between fault-free and faulty CABs. Different functions available in the component programming library are studied and a choice is made in order to obtain the best results in terms of sensitivity and test coverage. A functional fault model based on high-level parameters of the transfer function of the programmed blocks is adopted and the relationship between these parameters and CAB component deviations is investigated, therefore allowing to estimate the fault coverage and test application time of the proposed functional test method

Fault detection methodology for second order filters using compact test vectors transient analysis

This work proposes a functional approach for fault modeling in 2/sup nd/ order filters and presents a new use for the transient analysis method for fault detection. The approach considers the filter as a 2/sup nd/ order dynamic system and the use of the peak time and the system overshoot as observed parameters. The input stimuli are compact test vectors which consist of a step, ramp or parabola. The obtained results show that 100% of soft faults can be detected.

Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis

In this work a strategy for testing analog networks, known as Transient Response Analysis Method, is applied to test the Configurable Analog Blocks (CABs) of Field Programmable Analog Arrays (FPAAs). In this method the Circuit Under Test (CUT) is programmed to implement first and second order blocks and the transient response of these blocks to known input stimuli is analyzed. Taking advantage of the inherent programmability of the FPAAs, a BIST-based scheme is used in order to obtain an error signal representing the difference between fault-free and faulty CABs. Two FPAAs from different manufacturers and distinct architectures are considered as CUT. For one of the devices there is no detailed information about its structural implementation. For this reason, a functional fault model based on high-level parameters of the transfer function of the programmed blocks is adopted, and then, the relationship between these parameters and CAB component deviations is investigated. The other considered device allows a structural programming in which the designer can directly modify the values of programmable components. This way, faults can be injected by modifying the values of these components in order to emulate a defective behavior. Therefore, it is possible to estimate the fault coverage and test application time of the proposed functional test method when applied to both considered devices.

Fault Models and Test Generation for OpAmp Circuits—The FFM

The analog VLSI technology processes are reaching the matureness, nevertheless, there is a big constraint, regarding their use on complex electronic products: “the test”. The “Design for Testability” paradigm was developed to permit the test plan implementation early in the design cycle. However to succeed onto this strategy, the fault simulation should be carried out in order to evaluate appropriate test patterns, fault grade and so forth. Consequently adequate fault models must be established. Due to the lack of fault models, suitable to fault simulation on OpAmps, we propose in this work a methodology for Functional Fault Modeling-FFM, and some methods for test generation. A fault dictionary for OpAmps is built and a procedure for compact test vector construction is proposed. The results have shown that high level OpAmp requirements, as slew-rate, common mode rejection ration etc., can be checked by this approach with good compromise between the fault modeling problem, the analog nature of the circuit and the circuit complexity by itself.

ATPG for fault diagnosis on analog electrical networks using evolutionary techniques

This paper proposes a method for automated test pattern generation for fault diagnosis on continuous-time analog electrical networks based on evolutionary techniques. The paper states a method for coding a generic algorithm, based on a given heuristic, that are able to generate a set of optimum frequencies capable of disclosing parametric faults. The method itself is generic, and not based on specific or ad hoc features at all.

Filters designed for testability wrapped on the Mixed-Signal Test Bus

This work presents a design for test method for continuous time active filters of any order, using the IEEE 1149.4 as its backbone structure. The method relies on the synthesis of filter transfer functions using partial fraction extraction. Transfer functions are built from 1/sup st/ order blocks connected via the available standard infrastructure. Under this approach, structural test can be carried out using simple test vectors, which are disclosed according to a fault simulation process.

Fault detection in systems with 2nd order dynamics using transient analysis

This work proposes a transient analysis method for fault detection in systems with 2nd Order dynamics using a functional fault model. The approach considers the system pole-zero configuration as its main characteristic and its correspondence with the peak time and the system overshoot is used in order to detect the faults. The input stimulus is a compact test vector which consists of a step, ramp or parabola. The results show that for this sort of circuit 100% of faults can be detected.

Designing for test analog signal processors for MEMS-based inertial sensors

Conceptually, signal processors are systems, with reasonable complexity, were different mathematical operations are performed over signals derived from different origins. This paper presents the preliminary results for a Design for Test Methodology for analog signal processors, which can be used for MEMS and for the basic electronic circuitry around the micromachine core. The methodology is based on an analysis and a synthesis recursive process, which guarantees a good trade-of between extra structures, used to implement built-in self-test features in the original design. Basically, the whole design process is founded over the building of a system, with structural blocks, with a dynamic behavior of 1st and 2nd order.

Fault-Trajectory Approach for Fault Diagnosis on Analog Circuits

This issue discusses the fault-trajectory approach suitability for fault diagnosis on analog networks. Recent works have shown promising results concerning a method based on this concept for ATPG for diagnosing faults on analog networks. Such a method relies on evolutionary techniques, where a genetic algorithm (GA) is coded to generate a set of optimum frequencies capable of disclosing faults.