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Dive into the research topics where Joseph Ervin is active.

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Featured researches published by Joseph Ervin.


Proceedings of SPIE | 2017

Investigation of 3D photoresist profile effect in self-aligned patterning through virtual fabrication

Mustafa B. Akbulut; Jiangjiang Gu; Andras Pap; Vasanth Allampalli; Daniel Faken; Joseph Ervin; Ken Greiner; David M. Fried

The effects of photoresist sidewall profile and LER on two representative integration schemes were studied through 3D virtual fabrication: Front-End of Line (FEOL) Fin formation and Back-End of Line (BEOL) Metal line definition. Both of these processes use self-aligned double patterning (SADP) in pattern definition, and affect the circuit performance through MOSFET channel shape and parasitic capacitance respectively. In both cases we imposed LER and sidewall roughness on the photoresist that defines the mandrel at the initial step of the SADP flow using SEMulator3D. The LER followed a Gaussian correlation function for a number of amplitude and correlation length values. The sidewall profile emulated the bulb-shaped pattern that is reported in experimental works. The taper angle and roughness amplitude of this shape were varied to isolate its components. In each of these cases, we have found direct evidence of resist sidewall profile impact on variability degradation in CD and electrical performance. Special care should be placed on controlling resist profile through optimization of exposure and development schemes.


Archive | 2013

EMBEDDED DRAM FOR EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR

Roger A. Booth; Kangguo Cheng; Joseph Ervin; Ali Khakifirooz; Chengwen Pei; Ravi M. Todi; Geng Wang


Archive | 2013

Method of forming substrate contact for semiconductor on insulator (SOI) substrate

Geng Wang; Roger A. Booth; Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M. Todi


Archive | 2010

Self-aligned strap for embedded capacitor and replacement gate devices

Roger A. Booth; Kangguo Cheng; Joseph Ervin; Chengwen Pei; Geng Wang


Archive | 2014

Rare-earth oxide isolated semiconductor fin

Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M. Todi; Geng Wang


Archive | 2014

Deep isolation trench structure and deep trench capacitor on a semiconductor-on-insulator substrate

Roger A. Booth; Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M. Todi; Geng Wang


Archive | 2011

Isolation in CMOSFET devices utilizing buried air bags

Kangguo Cheng; Joseph Ervin; Jeffrey B. Johnson; Pranita Kulkarni; Kevin McStay; Paul C. Parries; Chengwen Pei; Geng Wang; Yanli Zhang


Archive | 2016

Metal trench capacitor and improved isolation and methods of manufacture

Roger A. Booth; Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M. Todi; Geng Wang


Archive | 2015

DEEP TRENCH CAPACITOR

Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M. Todi; Geng Wang


Archive | 2012

Lateral epitaxial grown soi in deep trench structures and methods of manufacture

Joseph Ervin; Brian W. Messenger; Karen A. Nummy; Ravi M. Todi

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