Joseph M. Pimbley

SiC MOS interface characteristics

It is well known that SiC can be thermally oxidized to form SiO/sub 2/ layers. And Si MOSFET ICs using thermally grown SiO/sub 2/ gate dielectrics are the predominant IC technology in the world today. However the SiC/SiO/sub 2/ interface has not been well characterized as was the case for Si MOS in the early 1960s. This paper presents data which for the first time characterizes the SiC/SiO/sub 2/ interface and explains one of the previously unexplained abnormalities observed in the characteristics of SiC MOSFETs. >

Charge detection modeling in solid-state image sensors

Solid-state image sensors continue to find many applications as fabrication technology improves. Due in part to the relatively small role that image sensors have played in the semiconductor world, there exists very little experience in performance modeling of this class of devices. In this paper we discuss a three-dimensional model of the image sensor responsivity. Responsitivity is simply the amount of charge detected by the image sensor divided by the input photon energy. We discuss the fundamental aspects of charge detection and formulate and solve the appropriate model. We find good agreement between this model and experimental data.

Dual-level transmission line model for current flow in metal-semiconductor contacts

Parasitic resistance in the metal-oxide-semiconductor field-effect transistor becomes increasingly important as design rules shrink. The majority of this resistance arises from the contact resistance of the metal-semiconductor interface and the resistance of the semiconductor source and drain regions. The most popular method for deriving current flow in this region is the transmission line model. Though this model has proven quite useful, the severe restriction of one-dimensional current flow will introduce errors in some situations. We formulate and solve a more sophisticated dual-level transmission line model in which we incorporate to first order the two-dimensional nature of the current flow. We discuss this model in terms of an enhancement to the transmission line model and present a detailed comparison of the two models. We find that the dual-level transmission line model produces significant (12 percent) corrections to the transmission line model with source resistivity and thickness and specific contact resistivity typical of 1-µm design rule technologies.

Design of Current Sensors in IGBT's

Summary form only given. The operation of current sensors (or pilots) in IGBTs (insulated-gate bipolar transistors) is described experimentally and with two-dimensional simulations. Two different sensor structures are compared. In the most conventional structure, a small IGBT, separated from the main device by metallization only, is used as a current sensor (or pilot) and the emitter of this small IGBT is connected to ground via a resistor. As the voltage at the emitter of the current sensor increases due to increasing current flow, the forward drop across the current sensor decreases and the ratio between the main current and the sensor current decreases. Experimentally, the dependence of the normalized current sensor (or pilot) voltage on the main IGBT current of a 500-V, n-channel, asymmetric IGBT has been shown to be fairly linear, except when a small main current or a large pilot resistor is used. The main-to-pilot current ratio increases with increasing carrier lifetime and increasing distance from the main IGBT. >

Current crowding in high-density VLSI metallization structures

Novel metallization schemes for submicrometer device interconnections abound in the continuing quest to increase layout density. As dimensions shrink, the current density flowing in these interconnection lines increases. For this reason, design and fabrication processes must seek to alleviate the possibility of electromigration failure. One factor that affects the electromigration mean time to failure is the degree to which the current flow within a metal conductor is distributed throughout the conductor volume. In this brief, we derive analytical expressions for the current density distribution within a promising new metallization structure. We then examine the uniformity of the current density and discuss the effect of metal resistivity on this current density distribution.

Two-dimensional current flow in the MOSFET source—Drain

Series resistance within the metal-oxide-semiconductor field-effect transistor erodes some of the performance improvement inherent to channel length reduction. The subject of series resistance, then, assumes greater importance as transistor dimensions shrink. Since current crowding effects at the source-drain ohmic contact and at the junction of the source-drain and the channel increase the apparent series resistance, we have studied current flow and its associated nonuniformity by two analytical solutions of Laplaces equation with appropriate boundary conditions. We show typical results of these solutions, discuss the effect of device scaling on the current flow, and present simulation data for the self-aligned silicide field-effect transistor. The implicit assumption that the ohmic contact and source-channel current crowding contribute independently to the apparent source resistance fails for these self-aligned silicide devices.