Joseph R. Marshall

Applying a high performance tiled rad-hard digital signal processor to spaceborne applications

This paper discusses the architecture and reviews the development of the RADSPEED™ DSP. It illustrates planned board solutions and briefly highlights the other critical components needed such as regulators, bridges to the rest of the spacecraft and high performance memory. The paper describes the various algorithm elements that may apply to the application classes and compiles information on RADSPEED algorithm elements. Lessons learned from development and translation of algorithms from single string to multi-processing elements using the supporting tools are given. For the many spaceborne processing applications that fit onto this architecture, the RADSPEED DSP provides a very high performance / power solution that will scale with the needs of the application.

Matching Processor Performance to Mission Application Needs

This paper explores the types of processing required in current spacecraft. It then differentiates between instrument control, command and data handling and signal processing applications and describes the processors typically utilized. Specific microcontrollers and general purpose processors are discussed followed by discussion of the analysis needed for determining performance of a multiple cache based processor. A brief look at future multi-processor solutions concludes the paper.

Next Generation Space Interconnect Standard (NGSIS): A modular open standards approach for high performance interconnects for space

The Next Generation Space Interconnect Standard (NGSIS) effort is a Government-Industry collaboration effort to define a set of standards for interconnects between space system components with the goal of cost effectively removing bandwidth as a constraint for future space systems. The NGSIS team has selected the ANSI/VITA 65 OpenVPX™ standard family for the physical baseline. The RapidIO protocol has been selected as the basis for the digital data transport. The NGSIS standards are developed to provide sufficient flexibility to enable users to implement a variety of system configurations, while meeting goals for interoperability and robustness for space. The NGSIS approach and effort represents a radical departure from past approaches to achieve a Modular Open System Architecture (MOSA) for space systems and serves as an exemplar for the civil, commercial, and military Space communities as well as a broader high reliability terrestrial market.

Reconfigurable and Processing Building Blocks in Responsive Space

[Abstract] Successful responsive spacecraft will likely span a large size range from nanosats on up. If responsive space efforts to standardize, streamline and simplify spacecraft design, integration and launch are successful these efforts will be applied across a variety of processing systems that must be scalable and flexible within the responsive space frameworks. Processing systems in responsive space will require plug and play capability and levels of reconfigurable processing to support this as well as to provide a flexible processing fabric after launch. To provide for reconfigurable signal processing in spacecraft environment, BAE Systems is developing a Universal Field Programmable Gate Array (FPGA) Support Device (UFSD) and demonstrating it on a board to enable responsive space bus and payload instruments to demonstrate modular spacecraft bus standards and interfaces with rapid, low-cost space assets. In parallel, BAE Systems is developing a RAD6000-based integrated microcontroller that can be provide flexible scalable general purpose processing for instruments, controls and data handling for small to medium C&DH and payload units as well as a plug and play port on electronics requiring more than a low speed serial link to interact with other spacecraft assets. This paper will describe the UFSD and RAD6000MC microcontroller architectures and how they, supplemented by other processing elements, may be applied to Plug and Play and other Responsive Space approaches. Taken together we will show how these provide building blocks that will contribute toward the reality of the six to seven day responsive spacecraft.

An embedded microcontroller for spacecraft applications

Originally conceived for fault tolerance control of its associated general purpose processor, the embedded microcontroller (EMC) present in BAE Systems Power PCI Bridge application specific integrated circuit (ASIC) has evolved into a processing workhorse finding applications spanning memory controllers, I/O processors as well as continuing to support the RAD750reg PowerPCreg processor. Development tools have also evolved from a simple assembler to a full development environment including compiler and simulator integrated with the PowerPC tools supporting the RAD750. This paper describes the evolution of the EMC within the Power PCI Bridge, development of its support tools and some of its applications as both a capable assistant to the RAD750 as well as a standalone processing element. Power and performance improvements are highlighted. Comparison to other processor cores that might be used in space is also shown. Discussion of future enhancements will also be mentioned

Quad-core radiation-hardened system-on-chip power architecture processor

Based on the QorIQ® system-on-chip processor architecture from Freescale Semiconductor with additional unique features for space applications, the RAD55xxTM system-on-chip platform integrated circuit can be personalized into multiple processor solutions. The RAD55xx platform includes four 32/64 bit Power Architecture® processor cores, three levels of on-die cache memory, dual interleaved DDR3 DRAM controllers, data path acceleration architecture (DPAA) on-die hardware accelerators, a NAND Flash controller, and high I/O throughput based on serializer/deserializer high speed links. Manufactured at the IBM trusted foundry in 45nm silicon-on-insulator (SOI) process technology with copper interconnect and leveraging the radiation-hardened by design RH45TM technology, the RAD55xx platform optimizes power/performance to deliver processor throughput of up to 5.6 GOPS/3.7 GFLOPS, memory bandwidth of up to 102 Gb/s, and I/O throughput of up to 64 Gb/s. Each of the highly efficient RAD5500™ 64-bit cores offers direct addressability to 64 GB of memory, improves double precision floating point performance, and achieves 3.0 Dhrystone MIPS/MHz. The RAD55xx platform is designed for insertion into systems using the SpaceVPX standard, supporting the RapidIO data plane, SpaceWire control plane, and I2C utility plane. Architectural trades, the development methodology, technical challenges, and single board computer solutions are discussed.

Increasing Performance and Removing Bottlenecks in Reconfigurable Space Processing

In this paper we describe a new building block under development for reconfigurable systems. This block marries programmable support circuitry for reconfigurable devices and non-volatile configuration memory into an integrated and expandable building block based on BAE Systems technologies in non-volatile memories and reconfigurable support logic. We will discuss the application of this building block and its insertion into various reconfigurable processing systems. We will describe its universal applicability and internal programming. In order to adapt to the changing RAM-based FPGA configuration interfaces and broad potential application of the technology, significant portions of the reconfigurable control logic are implemented in software. This embedded software design and implementation is discussed. We discuss the flexibility, applicability across FPGA families and the savings in size and power that are being utilized through its usage. We describe a test board that allows testing of the device elements, demonstration of reconfigurable applications, connections to various interfaces both heritage such as CompactPCI and SpaceWire and new interfaces such as Rocket IO, Rapid IO or PCI Express. We discuss its usage and insertion as a Plug and Play subsystem and application to responsive space systems.

Advancing reconfigurable processing subsystems in spaceborne applications

Reconfigurability is a key element to extracting more from spacecraft subsystems. Once deployed, subsystems may be used more fully and become obsolete later through reconfigurability, often not envisioned by their creators. We have built a set of reconfigurable processing building blocks and infrastructure centered on our RAD750TM processor products and standard interfaces. These blocks can create various processing architectures and be reconfigured at the software, interface or Field Programmable Gate Array (FPGA) levels. This creates an OS for hardware where it is as easy to change the hardware functions as it has been to create software functions in previous systems. ’ Reconfigurable systems utilize RAM-based or fused-based circuits. New technologies, such as our Chalcogenide memory, provide the advantages of both instant reconfiguration and non-volatility. Chalcogenide-based FPGA elements may be inserted into Application Specific Integrated Circuits (ASICs) and System-on-Chips (SOCs) to provide a reconfigurable component mixed with high performance elements that may adapt to the latest interface or algorithms. This is important in space systems when design and interface decisions remain embedded in systems for many generations.

Higher performance BAE systems processors and interconnects enabling spacecraft applications

Over the past decade, the amount of processing utilized in spacecraft has increased. From below 1 MIP in the 1980s to single digit MIPS in the early 1990s to 10s of MIPS by the end of the twentieth century to hundreds of MIPS today, the amount of processing is in an upward trend paralleling though lagging the commercial and military embedded processing markets. This has allowed processing to move from simple control and data handling (C&DH) into payloads and other data processing intensive areas. Along with this memory capacities have increased to provide storage for programs and data.

Applying Advanced Networks and Signal Processing to Spaceborne Computing

The RAD750® has provided the standard processing benchmarks for the past decade or so. With the RA DSP EED™ DSP and associated processor products, the raw performance and performance per watt will increase significantly, opening up many new applications to advanced programmed general and signal processing. In the near term, the RA DSP EED DSP User Board will provide the initial hardware platform for realizing this. The continuing development of the RA DSP EED -HB™ , DDR2 Memory and switching POL regulators over the next year or so will set the base for this capability to be realized in a fully qualified space board in the coming year..