Juan J. Rodriguez-Andina
University of Vigo
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Featured researches published by Juan J. Rodriguez-Andina.
IEEE Transactions on Industrial Electronics | 2010
Juan J. Rodriguez-Andina; Luís Gomes; Seta Bogosyan
Technology development creates many challenges in the education of industrial-electronics (IE)-related subjects. At the same time, it allows new educational paradigms to be implemented. The main contribution of this paper is to initiate a discussion for the needs and challenges of IE education both at university level and in lifelong learning, in order to meet the requirements of the emerging technologies of the 21st century. Educational challenges and opportunities are first identified and analyzed. Afterward, an overview of state-of-the-art learning methodologies and tools is presented. New educational paradigms and future directions are also identified.
IEEE Transactions on Industrial Electronics | 2008
Lucía Costas-Pérez; David Lago; Jose Farina; Juan J. Rodriguez-Andina
This paper presents an educational laboratory that has been implemented for the practical education in sensors, data acquisition, and basic control skills. The use of the laboratory has been optimized by the availability of a remote access infrastructure that allows the definition and booking of time slots related to the laboratory sites. Given the many kinds of existing sensors, conditioning circuits, and actuators, setting up an educational framework is a complex (and expensive) task, even if only the main design alternatives are taken into account. An additional and fundamental issue to be considered for the optimization of any educational resource or teaching/learning methodology is the possibility to adapt it to the capabilities of different profiles, i.e., students enrolled in different courses. The proposed solution has been designed to be used by both nonexperienced students, who act as plain users testing predefined experiments, and advanced ones, who can demonstrate the design skills they have learnt, by developing their own applications and conditioning circuits. Accordingly, the remote access infrastructure allows different kinds of users to be defined, whose capabilities, restrictions, and software requirements depend on their level of knowledge.
IEEE Transactions on Industrial Informatics | 2015
Juan J. Rodriguez-Andina; Maria D. Valdes-Pena; María José Moure
Field programmable gate arrays (FPGAs) have established themselves as one of the preferred digital implementation platforms in a plethora of current industrial applications, and extensions and improvements are still continuously being included in the devices. This paper reviews recent advancements in FPGA technology, emphasizing the novel features that may significantly contribute to the development of more efficient digital systems for industrial applications. Special attention is paid to the design paradigm shift caused by the availability of increasingly powerful embedded (and soft) processors, which transformed FPGAs from hardware accelerators to very powerful system-on-chip (SoC) platforms. New analog resources, floating-point operators, and hard memory controllers are also described, because of the great advantages they provide to designers. Software tools are being strongly influenced by the design paradigm shift, which requires from them a much better support for software developers. Focusing mainly on this issue, recent advancements in software resources [intellectual property (IP) cores and design tools] are also reviewed. The impact of new FPGA features in industrial applications is analyzed in detail in three main areas, namely digital real-time simulation, advanced control techniques, and electronic instrumentation, with focus on mechatronics, robotics, and power systems design. The way digital systems are being currently designed in these areas is comprehensively reviewed, and a critical analysis of how they could significantly benefit from new FPGA features is presented.
international test conference | 2000
Santiago Fernández-Gomez; Juan J. Rodriguez-Andina; Enrique Mandado
Today, encryption is widely used to incorporate privacy in data communications. Hardware implementations of encryption algorithms are fast enough to cope with the high throughput required in modern transmission channels. However, faults may occur in such circuits that can cause errors in encrypted text. A new technique is proposed to concurrently detect errors in block ciphers. It introduces very low area overhead in the system. In addition, a new encoding scheme is presented that has higher detection capabilities than other common error detection codes, when applied to encryption systems. Experiments conducted with widely used encryption algorithms (DES, RC5, IDEA and SKIPJACK) demonstrate the advantages of the proposed technique.
IEEE Industrial Electronics Magazine | 2016
Milos Manic; Dumidu Wijayasekara; Kasun Amarasinghe; Juan J. Rodriguez-Andina
Building automation systems (BAS), or building control systems (BCS), typically consist of building energy management systems (BEMSs), physical security and access control, fire/life safety, and other systems (elevators, public announcements, and closed-circuit television). BEMSs control heating, ventilation, and air conditioning (HVAC) and lighting systems in buildings; more specifically, they control HVACs primary components such as air handling units (AHUs), chillers, and heating elements. BEMSs are essential components of modern buildings, tasked with seemingly contradicting requirements?minimizing energy consumption while maintaining occupants? comfort [1]. In the United States, about 40% of total energy consumption and 70% of electricity consumption are spent on buildings every year. These numbers are comparable to global statistics that about 30% of total energy consumption and 60% of electricity consumption are spent on buildings. Buildings are an integral part of global cyber-physical systems (smart cities) and evolve and interact with their surroundings. As buildings undergo years of exploitation, their thermal characteristics deteriorate, indoor spaces (especially in commercial buildings) get rearranged, and usage patterns change. In time, their inner (and outer) microclimates adjust to changes in surrounding buildings, overshadowing patterns, and city climates, not to mention building retrofitting. Thus, even in cases of ideally designed BEMS/HVAC systems, because of ever-changing and uncertain indoor and outdoor environments, their performance frequently falls short of expectations. Unfortunately, the complexity of BEMSs, large amounts of constantly changing data, and evolving interrelations among sensor feeds make identifying these suboptimal behaviors difficult. Therefore, traditional data-mining algorithms and data-analysis tools are often inadequate.This article provides an overview of issues related to modern BEMSs with a multitude of (often conflicting) requirements. Because of massive and often incomplete data sets, control, sensing, and the evolving nature of these complex systems, computational intelligence (CI) techniques present a natural solution to optimal energy efficiency, energy security, and occupant comfort in buildings. The article further presents an overall architecture where CI can be used in BEMSs and concludes with a case study of the practical applications of using CI techniques in the BEMS domain.
IEEE Industrial Electronics Magazine | 2012
Jorge Rodríguez-Araújo; Juan J. Rodriguez-Andina; Jose Farina; Félix Vidal; J.L. Mato; Ma Ángeles Montealegre
Laser cladding is a deposition process, depicted in Figure 1, which uses a laser beam to melt the surface of a metallic substrate and a substance added in the form of powder flow so that the two materials are fused by metallurgical bonding. Usually, laser cladding consists of a processing head, where the laser beam and powder flow are generated, that moves over the target part. The melted powder particles and a thin layer of the substrate form a clad, whose thickness and penetration depend on the control parameters of the process.
IEEE Transactions on Industrial Electronics | 2008
J.L. Mato; Miguel Pereira; Juan J. Rodriguez-Andina; Jose Farina; Enrique Soto; R. Perez
Strong requirements are currently imposed to limit the negative effects of distortion or bad synchronization between emitter and receiver in digital communication channels. Distortion is mainly caused by the output stage of the emitters power amplifier. It can be mitigated by applying to the input signals a correction, causing them a distortion contrary to that occurring in the amplifier (i.e., a predistortion). This paper presents a new method which combines amplitude and phase predistortion for digital video broadcasting-terrestrial (DVB-T) gap fillers (intermediate reemitters) in single frequency networks. These systems impose severe limitations to the time available for processing, which prevents the application of existing predistortion techniques. The method is based on a new high-frequency model of the output stage of the emitters power amplifier, from which the design of an efficient amplitude and phase predistorter is straightforward. An advantageous tradeoff between complexity and processing time is achieved by applying predistortion at intermediate frequency. In addition, the proposed solution is independent of the frequency of the output radio frequency signals. A predistorter has been implemented in a field-programmable gate array and applied to a real gap filler. Experimental results which show the significant improvement achieved in the quality of real DVB-T signals, as well as the low complexity and low processing delay associated to the proposed approach, are presented.
IEEE Transactions on Industrial Informatics | 2014
Jorge Rodríguez-Araújo; Juan J. Rodriguez-Andina; Jose Farina; Mo-Yuen Chow
The ability to perform accurate localization is a fundamental requirement of the navigation systems intended to guide unmanned ground vehicles in a given environment. Currently, the use of vision-based systems is a very suitable alternative for some indoor applications. This paper presents a novel distributed FPGA-based embedded image processing system for accurate and fast simultaneous estimation of the position and orientation of remotely controlled vehicles in indoor spaces. It is based on a network of distributed image processing nodes, which minimize the amount of data to be transmitted through communication networks and hence allow dynamic response to be improved, providing a simple, flexible, low-cost, and very efficient solution. The proposed system works properly under variable or nonhomogeneous illumination conditions, which simplifies the deployment. Experimental results on a real scenario are presented and discussed. They demonstrate that the system clearly outperforms the existing solutions of similar complexity. Only much more complex and expensive systems achieve similar performance.
Journal of Low Power Electronics | 2008
Jorge Semião; J. Freijedo; Juan J. Rodriguez-Andina; Fabian Vargas; Marcelino B. Santos; Isabel C. Teixeira; J. Paulo Teixeira
The implementation of complex functionality in low-power (LP) nano-CMOS technologies must be carried out in the presence of enhanced susceptibility to PVT (Process, power supply Voltage and Temperature) variations. VT variations are environmental or operation-dependent parametric disturbances. Power constraints (in normal and test mode) are critical, especially for high-performance digital systems. Both dynamic and leakage power induce variable (in time and space) thermal maps across the chip. PVT variations lead to timing variations. These should be accommodated without losing performance. Dynamic, on-line time management becomes necessary. The purpose of this paper is to present a VT-aware time management methodology which leads to improved PVT tolerance, without compromising performance or testability. First, the methodology is presented, highlighting its characteristics and limitations. Its underlying principle is to introduce additional tolerance to VT variations, by time borrowing, dynamically controlling the time of the clock edge trigger driving specific memory cells (referred to as critical memory cells, CME). VT variations are locally sensed, and dynamic delay insertion in the clock signal driving CME is performed, using Dynamic Delay Buffer (DDB) cells. Then, methodology automation, using the proprietary DyDA tool, is explained. The methodology is proved to be efficient, even in the presence of process variations. Finally, it is shown that VT tolerance insertion does not necessarily reduce delay fault detection, as multi-V DD or multi-frequency self-test can be used to recover detection capability.
IEEE Industrial Electronics Magazine | 2016
Milos Manic; Kasun Amarasinghe; Juan J. Rodriguez-Andina; Craig Rieger
Intelligent buildings are quickly becoming cohesive and integral inhabitants of cyberphysical ecosystems. Modern buildings adapt to internal and external elements and thrive on ever-increasing data sources, such as ubiquitous smart devices and sensors, while mimicking various approaches previously known in software, hardware, and bioinspired systems. This article provides an overview of intelligent buildings of the future from a range of perspectives. It discusses everything from the prospects of U.S. and world energy consumption to insights into the future of intelligent buildings based on the latest technological advancements in U.S. industry and government.