María Dolores Valdés

Implementing a Fieldbus Interface Using an FPGA

Fieldbuses are serial communication buses frequently used in industrial applications. There are a lot of different commercial solutions making difficult the compatibility between the equipment of different manufacturers. In this way to change an equipment implies to change the fieldbus too with the consequent economic losses. To avoid this problems this paper proposes the implementation of the fieldbus protocol in a reconfigurable device. Using reconfigurable devices it is possible to modify the protocol of a communication bus without changing its hardware support. Due to the diversity of commercial fieldbuses this work is centered on the implementation of a FPGA based interface for WorldFIP, one of the most popular fieldbuses.

Educational application of virtual instruments based on reconfigurable logic

A number of computer assisted learning (CAL) tools which complement traditional learning methods have been developed due to the decreasing cost and increasing capacity of personal computers. Nevertheless, there are only a few experiences of combining CAL tools with practical experiments. This is the particular case of electronics where practical education is based on traditional independent instruments and CAL tools are use for simulation only. A new approach of CAL tools in electronics is the virtual instrumentation technique. Virtual instruments result from the combination of a general purpose computer with a generic data acquisition system in order to emulate several traditional measurement instruments. Virtual instruments are characterized by their versatility and low cost so they are very suitable for educational applications. Nevertheless, the operation rate of these instruments is limited by the general-purpose orientation of the hardware. In this work, the authors propose a new solution for the implementation of virtual instruments based on reconfigurable data acquisition systems. The whole system is characterized by its versatility because software and hardware modules change dynamically according to the application requirements. By this way, virtual instruments provides a link between CAL tools and the external systems used in practical experiments.

Aging monitoring with local sensors in FPGA-based designs

In nanoscale FPGAs, variability and aging significantly limit performance. In this paper, a novel aging monitoring methodology for FPGA-based designs to mitigate those effects is proposed. Local sensors are embedded in the configured functionality, monitoring critical paths, at production or during product lifetime. No design freeze (slice and routing locked) is required. When sensors observe a users defined time guardband violation, safe operation is endangered and action can be triggered, either to reduce clock frequency or to increase core VDD. Simulation and experimental results are presented, using Spartan 6 boards and vendor tools. The testbench uses a Data Acquisition (DAQ) system with Triple Modular Redundancy (TMR) architecture and a Built-In Self-Test (BIST) infrastructure. It is shown that local sensors will anticipate system failure. Various devices are also used to analyze sensitivity to process variations.

Performance Failure Prediction Using Built-In Delay Sensors in FPGAs

The objective of this paper is to propose a performance failure prediction methodology for FPGA-based designs, based on the use of a novel built-in programmable delay sensor. Digital Clock Managers (DCM) is used to fine tune the unsafe observation interval. The design procedure is described, including the constrained placement of some delay sensors. The proposed technique is particularly useful to monitor parametric Process, supply Voltage and Temperature (PVT) and aging-induced variations. It can be used during product lifetime, as a predictive delay fault detection technique, either to avoid unreliable operation, or to guarantee correct functionality with lower power consumption. The usefulness of the proposed technique is demonstrated with part of the data processor of a complex design for a medical imaging system used in PET-based mammography, configured in a Virtex-4 FPGA device (xc4vfx60-11ff1152).

A Reconfigurable Communication Processor Compatible with Different Industrial Fieldbuses

Fieldbuses constitute the lower level of communication networks in a flexible manufacturing system. Nowadays there are a lot of proprietary protocols, thus the interconnection of equipment from different manufacturers has become very problematic. Changing equipment supposes the change of the fieldbus too with the consequent economic losses. This paper proposes the implementation of a communication processor based on a reconfigurable device that makes different fieldbuses compatible. In this way, using the appropriate level and impedance matching circuit, the same hardware can be connected to different fieldbuses. In order to verify this proposal a communication processor based on an FPGA supporting two very important fieldbus standards in the area of industrial control such as WorldFIP and Profibus, has been developed. Design constraints and performance of the implemented processor are analyzed in this paper.

Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects

In current nanometer technologies, aging effects (due for instance to Negative Bias Thermal Instability) may appear after relatively short operating times, compared to the expected lifetime of circuits, even for relatively short-cycle consumer electronics. Therefore, there is an increasing need for on-chip aging monitoring. This paper presents a programmable aging sensor that can be embedded in FPGA-based designs, using standard resources available in those devices. The sensing principle is to monitor performance degradation over time. Depending on whether dynamic or static aging effects are dominant, the sensor can operate continuously or be only activated at some time intervals. Given the reduced amount of resources required by the sensor, it can be instantiated not only in the critical paths of a circuit, but also in those that may be identified to be more likely affected by aging affects. Experimental results are presented to demonstrate the performance of the proposed sensor.

Hardware solution of a polyphase filter bank for MP3 audio processing

Audio processing and especially MP3 decoding is usually implemented by software due to the complexity of its hardware alternative. This work proposes a hardware solution to one of the most critical parts of an MP3 decoder, the polyphase filter bank. The aim is to improve its operation rate while saving power. The proposal takes advantage of the DSP-oriented architecture of modern FPGAs. Sequential operations in software can be parallelised in hardware and time critical functions can be accelerated. The Alterapsilas Stratix EP1S10F780C6ES FPGA was used as hardware support. DSP Builder design tools was used together with Matlab and Quartus II in order to simplify the design and simulation tasks. As a result, a synthesis polyphase filter bank, working in real time, was designed and tested.

A FPGA-based frequency measurement system for high-accuracy QCM sensors

This paper proposes the design and implementation of a FPGA-based frequency measurement system for Quartz Crystal Microbalance (QCM) sensors. Using different design techniques a bandwidth of 40 MHz and a resolution of 0,05Hz is achieved. This work is part of a bigger project focused on the development of a standalone QCM system for the analysis and characterization of different paints. Two methods are used to implement the digital counter, the direct frequency measurement and the delay lines. Special attention is paid in the design of the time-base generator. Measurement errors due to the drift of the system oscillator are discussed, and several solutions are proposed taking advantage of the embedded DLL circuits available in the FPGAs. The designed digital counter is implemented and tested using the Xilinxpsilas Spartan XC3S200 FPGA.

Interactive Practical Teaching of Digital Circuits Design by Means of Field Programmable Gate Arrays

A computer assisted instruction system is presented here. It is focused on the interactive practical teaching of the digital circuit design based on Field Programmable Gate Arrays (FPGAs). The working methodology comprises the proposal of a problem, the search for a circuital solution and the implementation and verification of the designed circuit. This methodology is intended to develop some skills required by the students for the mastery of new technologies and the acquisition of hands-on experience, so important for their future professional life.

Implementation of a Frequency Measurement Circuit for High-Accuracy QCM Sensors

This paper presents the design of a FPGA-based digital counter for the measurement of the oscillation frequency of quartz crystal microbalance (QCM) sensors. This work is part of a bigger project focused on the development of a standalone QCM system for the analysis and characterization of organic coatings. The method used to implement the digital counter is the direct frequency measurement. Therefore, special attention is paid in the design of the time-base generator. Measurement errors due to the drift of the system oscillator are discussed, and several solutions are proposed taking advantage of the embedded PLL circuits available in the FPGAs. The designed digital counter is implemented and tested using the Alteras Stratix EP1S10F780C6 FPGA.