Jungwoo Song

A 120 dB Dynamic Range 400 mW Class-D Speaker Driver With Fourth-Order PWM Modulator

High efficiency Class-D speaker drivers have become ubiquitous in battery driven mobile audio applications. Analog switching errors and timing jitter are known limitations to the dynamic range in these types of switching audio drivers. To overcome these limitations the Class-D architecture chosen in this paper provides a low 667 kHz pulse rate. This architecture is based on a 4th-order digital modulator with pulse-width modulation (PWM) feedback. The modulator loop processes the PWM signals at a high 24 MHz clock rate, and provides pulse edge timing resolution within a single clock period of the high-rate clock. Timing distortion errors due to uniform sampling of the low-rate PWM signals are reduced with the high forward loop gain of the digital modulator feedback loop. The driver receives a 22-bit digital audio input and combines the functionality of a high-fidelity digital-to-analog converter (DAC) with a speaker driver. It achieves 120 dB dynamic range over a 20 kHz bandwidth, provides 88% power efficiency while driving an 8 Ω speaker load, and consumes a total quiescent current of 2.4 mA.

A Low-Power, High-Fidelity Stereo Audio Codec in 0.13

A 1.5 V low-power stereo audio codec in 0.13 μm CMOS is described. The microphone path includes a programmable gain stage with an enhanced transconductance cell followed by a continuous-time ΣΔ ADC with capacitive feed-forward and capacitive direct feedback. The speaker path employs a 1 mA Class-AB speaker amplifier with an improved quiescent current control circuit that delivers 30 mW to a 32 Ω speaker. The audio input and output paths achieve 92 and 98 dB dynamic range, respectively, with 6.5 mA total quiescent current.

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An integrated ultralow EMI Class-D amplifier with a feed-forward ADC and feedback filters is demonstrated in a 180 nm CMOS and wire-bonded package. Circuit and architecture techniques, which enable 1.75 W into an 8 Ohm speaker, 105 dB SNR, 95% efficiency, 0.004% THD+N, and 15.4 dB margin beyond the EN55022 Class-B standard, are discussed.

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Circuit techniques that overcome practical noise, reliability, and EMI limitations are reported. An auxiliary loop with ramping circuits suppresses pop-and-click noise to 1 mV for an amplifier with 4 V-achievable output voltage. Switching edge rate control enables the system to meet the EN55022 Class-B standard with a 15 dB margin. An enhanced scheme detects short-circuit conditions without relying on overlimit current events.

Integrated Class-D Audio Amplifier With 95% Efficiency and 105 dB SNR

A 400mW class-D speaker driver is implemented in 65nm CMOS technology, using a 4th-order digital PWM modulator to eliminate the DAC and minimize the effects of analog imperfection. It achieves 120dB dynamic range with up to 88% power efficiency while driving an 8Ω speaker load.

Integrated Pop-Click Noise Suppression, EMI Reduction, and Short-Circuit Detection for Class-D Audio Amplifiers

An integrated ultralow EMI Class-D amplifier with a feed-forward ADC and feedback filters is demonstrated in a 180 nm CMOS and wire-bonded package. Circuit and architecture techniques, which enables 1.75W into an 8 Ohm speaker, 105 dB dynamic range, 95% efficiency, 0.004% THD+N, and 15.4 dB margin beyond the EN55022 Class B standard, are discussed.

A 120dB dynamic range 400mW class-D speaker driver with 4 th -order PWM modulator

Circuit techniques to overcome practical noise, reliability, and EMI limitations are reported. An auxiliary loop with ramping circuits suppresses pop-and-click noise to 1 mV for an amplifier with 4V achievable output voltage. Switching edge rate control enables the system to meet the EN55022 Class-B standard with a 15 dB margin. An enhanced scheme detects short-circuit conditions without relying on over-limit current events.

An 8Ω, 1.75W, 95% efficiency, 0.004% THD+N Class-D amplifier with a feed-forward ADC and feedback filters

Low-power and full-featured stereo audio CODECs are increasingly needed in wireless devices, such as Bluetooth headsets and smart phones. These portable devices are usually powered by low-voltage batteries with limited capacities. It is of particular importance that such CODECs be optimized for low-voltage operation and low-power consumption. The paper presents a 1.5V 10mW full-featured stereo audio CODEC that is integrated with a Bluetooth radio and PMU on a single die. As depicted in Fig. 4.5.1, the CODEC contains microphone PGAs, audio ΔΣ ADCs and DACs, speaker drivers and microphone bias generators.