Junichi Yamazaki

On sensor image compression

In this paper, we propose a novel image sensor which compresses image signals on the sensor plane. Since an image signal is compressed on the sensor plane by making use of the parallel nature of image signals, the amount of signal read out from the sensor can be significantly reduced. Thus, the potential applications of the proposed sensor are high pixel rate cameras and processing systems which require very high speed imaging or very high resolution imaging. The very high bandwidth is the fundamental limitation to the feasibility of those high pixel rate sensors and processing systems. Conditional replenishment is employed for the compression algorithm. In each pixel, current pixel value is compared to that in the last replenished frame. The value and the address of the pixel are extracted and coded if the magnitude of the difference is greater than a threshold. Analog circuits have been designed for processing in each pixel. A first prototype of a VLSI chip has been fabricated. Some results of experiments obtained by using the first prototype are shown in this paper.

A CMOS imager hybridized to an avalanche multiplied film

A highly sensitive solid-state imager has been made by connecting an avalanche multiplier film to a MOS readout circuit through microbump electrodes. Optimization of the vapor-deposition conditions for the indium bump material made it possible for microbumps 5 /spl mu/m in diameter and 5 /spl mu/m in height to be formed into a 2/3-in matrix array of 380 000 pixels. A prototype imager was constructed with a 0.5-/spl mu/m thick avalanche photoconductive film. Clear avalanche multiplication of about ten times was observed at an applied voltage of 75 V. The imager had a good resolution and no recognizable afterimages.

A novel image sensor for video compression

A novel image sensor on which video signals can be compressed is proposed. Since the video signal is compressed on an imager plane by using fast analog processing, the amount of image data read out from the imager can be significantly reduced with very small latency. The proposed system can be potentially applied to high pixel rate cameras such as those for high speed imaging and high resolution imaging. Conditional replenishment is employed for the video compression algorithm. Analog circuits are designed both for processing in each pixel and for controlling the entire data rate. The behavior of the circuit is investigated on the basis of both an analog circuit simulator and a scale-up-circuit. A VLSI chip is designed and is under fabrication.<<ETX>>

An image sensor for on-sensor-compression

We present a novel image sensor on which image signal can be compressed. Since image signal is compressed on an imager plane by making use of parallel nature of image signals, the amount of signal read out from the imager can be significantly reduced. Thus, the proposed sensor can be potentially applied to high pixel rate cameras and processing systems which require very high speed imaging and very high resolution real time imaging; the very high bandwidth is the fundamental limitation for feasibility of those high pixel rate sensors and processing systems. Analog circuits have been designed both for processing in each pixel and for controlling entire data rate. A first prototype of a VLSI chip has been fabricated. Some results of the examination are shown in this paper.

On sensor image compression for high pixel rate imaging: pixel parallel and column parallel architectures

We propose a novel concept of an integration of compression and sensing in order to enhance performance of an image sensor. By integrating the compression function on the sensor plane, the image signal that has to be read out from the sensor is significantly reduced. Thus, the integration can consequently increase the pixel rate of the sensor. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. In this paper, we discuss design and implementation of two architectures for on-sensor compression. One is a pixel parallel approach and the other is a column parallel approach. We describe both approaches and design and a prototype of pixel parallel architecture.

Image sensor for compression and enhancement

In this paper, we propose a novel image sensor on which a video signal can be compressed. By making use of very fast analog processing on the imager plane, the compression sensor can significantly reduce the amount of pixel data output from the sensor. A prototype sensor with 32/spl times/32 pixels has been fabricated using standard 2 /spl mu/m CMOS technology. Some results of examinations are shown in this paper. We also describe a motion adaptive enhancement sensor which controls storage time independently pixel by pixel. The proposed sensor is intended to have high temporal resolution in the moving area and high SNR in the static area. According to preliminary experiments, the value of SNR increases about 5 dB compared to the video compression sensor.

New color TV cameras for ultraviolet, near infrared and visible light

Two kinds of TV cameras have been developed that are capable of showing the wavelengths of ultraviolet, infrared, and visible light by means of a false color method. One is sensitive to wavelengths from 250 to 650 nm (ultraviolet to yellow). It can simulate the color vision of the honey bee and other insects, reproducing the nectar guide of a flower or displaying the sex of a cabbage white moth, which is indistinguishable to the naked eye. The other is sensitive to a wider wavelength of 250 to 1,050 nm (ultraviolet to near infrared). According to the filter selected, it obtains not only visual images of invisible light information but also pictures same as those from an ordinary color camera. These TV cameras can be applied in many fields, including science, art, medicine, and industry.

Solid State Imaging Techniques. A Novel Image Sensor for On-Sensor-Compression.

In this paper, we propose a novel image sensor by which the image signal can be compressed. Since the image signal is compressed on the imager plane by making use of the parallel nature of image signals, the amount of signal readout from the imager can be significantly reduced. Thus, the proposed sensor can potentially be applied to high-pixel-rate cameras and real-time processing systems which require very high-speed imaging and very high resolution for real-time imaging; the very high bandwidth is the fundamental limitation to the feasibility of such high-pixel-rate sensors and processing systems. The proposed sensor utilizes a conditional replenishment algorithm; it detects temporally changing pixels as active pixels and output them. An analog circuit for processing in each pixel and an entire sensor architecture have been designed. A first prototype of a VLSI sensor chip has been fabricated. Results of experiments using the prototype chip are shown.

Sensor image compression for very high pixel-rate imaging and processing

In this paper, we propose a novel image sensor which compresses image signal on the sensor plane. Since image signal is compressed on the sensor plane by making use of the parallel nature of image signals, the amount of signal read out from the sensor can be significantly reduced. Thus, the proposed sensor can be potentially applied to high pixel rate cameras and processing systems which require very high speed imaging or very high resolution real time imaging. The very high bandwidth is the fundamental limitation to the feasibility of those high pixel rate sensors and processing systems. Conditional replenishment is employed for the compression algorithm. In each pixel, current pixel value is compared to that in the last replenished frame. The value and the address of the pixel is extracted and coded if the magnitude of the difference is greater than a threshold. Analog circuits have been designed both for processing in each pixel and for controlling entire data rate. A first prototype of a VLSI chip has been fabricated. Some results of experiments obtained by using the first prototype are shown in this paper.

Focal plane compression sensors

We propose a novel integration of compression and sensing in order to enhance performance of the image sensor. By integrating compression function on the sensor plane, the image signal that has to be readout from the sensor is significantly reduced. Thus, the integration can consequently increase the pixel rate of the sensor. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. In this paper, we discuss design and implementation of two architectures for on sensor compression. One is pixel parallel approach and the other is column parallel approach. We describe and compare both approaches.