Mitsutoshi Hatori

Combinations of an adaptive array antenna and a canceller of interference for direct-sequence spread-spectrum multiple-access system

In the realization of code-division multiple access based on a spread-spectrum communication system, i.e. spread-spectrum multiple access (SSMA), reduction of cochannel interference is an important problem. An adaptive array antenna system is proposed that includes a cancellor of cochannel interference, which can improve performance by a combination of temporal and spatial filtering. While the adaptive array suppresses interference sources with arrival angles different from those of the desired user, the adaptive digital filter-canceller rejects those whose arrival angles are the same as those of the desired user. The proposed system can achieve stable acquisition and low error rate of demodulated data even in a heavy-interference channel where a conventional array antenna system cannot achieve satisfactory acquisition. >

An adaptive canceller of cochannel interference for spread-spectrum multiple-access communication networks in a power line

The authors propose and investigate an adaptive canceller of intersymbol and cochannel interference due to channel distortion and cross-correlation among pseudonoise sequences assigned to individual users of a DS-SSMA (direct-sequence spread-spectrum multiple-access) system. In order to implement a local area network (LAN) by using a power line installed in a building wall as a transmission channel, the authors have investigated utilization of DS-SSMA which has advantages such as robustness against narrow-band interference and noise and realization of asynchronous code division multiple access. In a power line, however, restriction of transmission bandwidth for communications makes it difficult to suppress cochannel interference and the channel is also time-varying due to fluctuation of loads. Since the proposed canceller adaptively eliminates cochannel interference as well as intersymbol interference, it can facilitate synchronization and increase the number of the simultaneously accessing users on a power line with restricted processing gain. The error probability in the output of the canceller is theoretically calculated for the steady-state case by using a Markov model. Computer simulations illustrate stable convergence properties of the canceller. >

Computational image sensor for on sensor compression

We propose a novel integration of image compression and sensing in order to enhance the performance of an image sensor. By integrating a compression function onto the sensor focal plane, the image signal to be read out from the sensor is significantly reduced and the pixel rate of the sensor ran consequently be increased. The potential applications of the proposed sensor are in high pixel-rate imaging, such as high frame-rate image sensing and high-resolution image sensing. The compression scheme we employ is a conditional replenishment, which detects and encodes moving areas. In this paper, we introduce two architectures for on-sensor compression; one is the pixel parallel approach and the other is the column parallel approach. We prototyped a VLSI chip of the proposed sensor based on the pixel parallel architecture. We show the design and describe the results of the experiments obtained by the prototype chip.

On sensor image compression

In this paper, we propose a novel image sensor which compresses image signals on the sensor plane. Since an image signal is compressed on the sensor plane by making use of the parallel nature of image signals, the amount of signal read out from the sensor can be significantly reduced. Thus, the potential applications of the proposed sensor are high pixel rate cameras and processing systems which require very high speed imaging or very high resolution imaging. The very high bandwidth is the fundamental limitation to the feasibility of those high pixel rate sensors and processing systems. Conditional replenishment is employed for the compression algorithm. In each pixel, current pixel value is compared to that in the last replenished frame. The value and the address of the pixel are extracted and coded if the magnitude of the difference is greater than a threshold. Analog circuits have been designed for processing in each pixel. A first prototype of a VLSI chip has been fabricated. Some results of experiments obtained by using the first prototype are shown in this paper.

Estimation of camera parameters from image sequence for model-based video coding

The authors describe a method for estimating camera parameters from image sequences for application to emerging model-based video coding systems. The parameters to be estimated include focal length, zoom, and 3-D rotation parameters. The method consists of first establishing a correspondence and then, estimating the parameters by fitting the correspondence data to a transformation model based on a perspective mapping model and a 3-D rotation and zoom operation model. They show by simulations and experiments that the proposed method successfully estimates the focal length from the image sequences, it explains very well the induced motion field of images undergoing camera operation (3-D rotation and zoom), and that it significantly outperforms conventional estimation methods, especially for wide-angled images. It is anticipated that the proposed method will be successfully applied to compensating for the motion field induced by camera operation in extracting a 3-D object model and a 3-D object motion, and to synchronizing the viewing direction and scale of an image, in model-based video coding technology. >

Detection and tracking of facial features

Detection and tracking of facial features without using any head mounted devices may become required in various future visual communication applications, such as teleconferencing, virtual reality etc. In this paper we propose an automatic method of face feature detection using a method called edge pixel counting. Instead of utilizing color or gray scale information of the facial image, the proposed edge pixel counting method utilized the edge information to estimate the face feature positions such as eyes, nose and mouth in the first frame of a moving facial image sequence, using a variable size face feature template. For the remaining frames, feature tracking is carried out alternatively using a method called deformable template matching and edge pixel counting. One main advantage of using edge pixel counting in feature tracking is that it does not require the condition of a high inter frame correlation around the feature areas as is required in template matching. Some experimental results are shown to demonstrate the effectiveness of the proposed method.

Home Informatization and Standardization of Home Bus

Advanced telecommunication systems and home-automation systems are being increasingly installed in Japanese homes.

Design of Automatic Equalizer Including a Decoder of Error-Correcting Code

A new proposed automatic equalizer including a decoder of error-correcting code (AEDEC) is obtained by the joint adaptive operation of an automatic equalizer and a decoder. This AEDEC can reduce misadjustment of tap values and error propagation owing to decision errors, and stabilize convergence even without a known training signal in noisy channels.

Generation of arbitrarily focused images by using multiple differently focused images

We propose a novel method of arbitrarily focused image generation using multiple differently focused images. First, we describe our previously proposed select and merge method for all focused image acquisition. We can get good results by using this method but it is not easy to extend this method for generating arbitrarily focused images. Then, based on the assumption that depth of a scene changes stepwise, we derive a formula for reconstruction between the desired arbitrarily focused image and multiple acquired images; we can reconstruct the arbitrarily focused image by iterative use of the formula. We also introduce coarse-to-fine estimation of point spread functions (PSFs) of the acquired images. We reconstruct arbitrarily focused images for a natural scene. In other words, we simulate virtual cameras and generate images focused on arbitrary depths.

Computational image sensors for on-sensor-compression

In this paper, we propose novel image sensors which compress image signal. By making use of very fast analog processing on the imager plane, the compression sensor can significantly reduce the amount of pixel data output from the sensor. The proposed sensor is intended to overcome the communication bottle neck for high pixel rate imaging such as high frame rate imaging and high resolution imaging. The compression sensor consists of three parts; transducer, memory and processor. Two architectures for on-sensor-compression are discussed in this paper that are pixel parallel architecture and column parallel architecture. In the former architecture, the three parts are put together in each pixel, and processing is pixel parallel. In the latter architecture, transducer, processor and memory areas are separated, and processing is column parallel. We also describe a prototype chip of pixel-parallel-type sensor with 32/spl times/32 pixels which has been fabricated using 2 /spl mu/m CMOS technology. Some results of examinations are shown in this paper.