Takayuki Hamamoto

A computational image sensor with adaptive pixel-based integration time

An image sensor is proposed in which the pixel adapts its integration time to motion and light. The integration time of each pixel is shortened if motion is detected in the pixel or pixel intensity becomes saturated. The adaptivity of motion and light significantly enhances temporal resolution and dynamic range of the sensor. Because the integration time differs pixel-by-pixel, a scene containing both a bright and a dark region will be captured by pixels of shorter and longer integration times. Because the integration time adapts to motion, higher temporal resolution is obtained in a moving area and a higher signal-to-noise ratio in a static area. The control of the integration time is done on the sensor focal plane, with column parallel processing circuits integrated in CMOS image sensor. A prototype of 32/spl times/32 pixels has been fabricated by using 1-poly 2-metal CMOS 1-/spl mu/m process. The fundamental functions have been verified. By the experiments, it has been verified that the sensor can reduce motion blur by adapting the integration time to motion and achieve wide dynamic range by adapting to light when the minimum integration interval is 680 /spl mu/s.

On sensor image compression

In this paper, we propose a novel image sensor which compresses image signals on the sensor plane. Since an image signal is compressed on the sensor plane by making use of the parallel nature of image signals, the amount of signal read out from the sensor can be significantly reduced. Thus, the potential applications of the proposed sensor are high pixel rate cameras and processing systems which require very high speed imaging or very high resolution imaging. The very high bandwidth is the fundamental limitation to the feasibility of those high pixel rate sensors and processing systems. Conditional replenishment is employed for the compression algorithm. In each pixel, current pixel value is compared to that in the last replenished frame. The value and the address of the pixel are extracted and coded if the magnitude of the difference is greater than a threshold. Analog circuits have been designed for processing in each pixel. A first prototype of a VLSI chip has been fabricated. Some results of experiments obtained by using the first prototype are shown in this paper.

Computational image sensors for on-sensor-compression

In this paper, we propose novel image sensors which compress image signal. By making use of very fast analog processing on the imager plane, the compression sensor can significantly reduce the amount of pixel data output from the sensor. The proposed sensor is intended to overcome the communication bottle neck for high pixel rate imaging such as high frame rate imaging and high resolution imaging. The compression sensor consists of three parts; transducer, memory and processor. Two architectures for on-sensor-compression are discussed in this paper that are pixel parallel architecture and column parallel architecture. In the former architecture, the three parts are put together in each pixel, and processing is pixel parallel. In the latter architecture, transducer, processor and memory areas are separated, and processing is column parallel. We also describe a prototype chip of pixel-parallel-type sensor with 32/spl times/32 pixels which has been fabricated using 2 /spl mu/m CMOS technology. Some results of examinations are shown in this paper.

A novel image sensor for video compression

A novel image sensor on which video signals can be compressed is proposed. Since the video signal is compressed on an imager plane by using fast analog processing, the amount of image data read out from the imager can be significantly reduced with very small latency. The proposed system can be potentially applied to high pixel rate cameras such as those for high speed imaging and high resolution imaging. Conditional replenishment is employed for the video compression algorithm. Analog circuits are designed both for processing in each pixel and for controlling the entire data rate. The behavior of the circuit is investigated on the basis of both an analog circuit simulator and a scale-up-circuit. A VLSI chip is designed and is under fabrication.<<ETX>>

An image sensor for on-sensor-compression

We present a novel image sensor on which image signal can be compressed. Since image signal is compressed on an imager plane by making use of parallel nature of image signals, the amount of signal read out from the imager can be significantly reduced. Thus, the proposed sensor can be potentially applied to high pixel rate cameras and processing systems which require very high speed imaging and very high resolution real time imaging; the very high bandwidth is the fundamental limitation for feasibility of those high pixel rate sensors and processing systems. Analog circuits have been designed both for processing in each pixel and for controlling entire data rate. A first prototype of a VLSI chip has been fabricated. Some results of the examination are shown in this paper.

Real-time image processing by using image compression sensor

We have been investigating an integration of sensing and compression on an image sensor. The compression sensor reduces the number of pixels in the image signal that has to be readout from the sensor. Therefore, the compression sensor can capture the images at the higher pixel rate which the traditional sensor can not handle. In this paper, we present a compression sensor which has 228/spl times/128 pixels. The processing circuits of the sensor can be operated at 5000 frames/second. We also describe the experimental results of two real-time image processing systems by using the compression sensor. They are a reconstruction circuit by using FPGA and a stereo image processing system for tracking of a moving object.

Lip Recognition Using Morphological Pattern Spectrum

For the purpose of recognizing individuals, we suggest a lip recognition method using shape similarity when vowels are uttered. In the method, we apply the mathematical morphology, in which three kinds of structuring elements such as square, vertical line and horizontal line are used for deriving pattern spectrum. The shapeness vector is compared with the reference vector to recognize individual from lip shape. According to experimental results with 8 lips uttered five vowels, it is found that the method successfully recognizes lips with 100% accuracy.

A computational image sensor with pixel-based integration time control

We have been investigating a computational sensor which controls the integration time of every pixel independently. Because the integration time is controlled, higher temporal resolution and wider dynamic range can be achieved. We present a new adaptive integration time image sensor which has 128/spl times/64 pixels. We adopt a column parallel architecture to design the prototype chip. The scheme to control integration time is extended, and pixel pitch, processing speed and power consumption are much improved in comparison with our previous prototype. We show some experimental results obtained with the prototype.

Motion adaptive image sensor

We propose a motion adaptive sensor for image enhancement and wide dynamic range sensing. The motion adaptive sensor is able to control integration time pixel by pixel. The integration time is determined by saturation and temporal changes of incident light. It is expected to have high temporal resolution in the moving area, high SNR in the static area, and wide dynamic range. We have fabricated a prototype and show some results obtained by our experiments.

Image compression sensor based on column parallel architecture

Abstract We propose a novel image sensor which has compression function on its sensor plane. The image compression sensor can significantly reduce the amount of pixel data output from the sensor. The proposed sensor is intended to overcome the communication bottle neck for high pixel rate imaging such as high frame rate imaging and high resolution imaging. The compression algorithm is based on conditional replenishment. It detects motion and encodes only the pixels in moving areas. We have been investigating pixel parallel and column parallel architectures of the image compression sensor. In this paper, we present the column parallel architecture of the proposed sensor. In this architecture, fill factor and power dissipation are comparable to conventional MOS sensors in spite of integration of the processing circuits. We have fabricated a prototype chip based on the column parallel architecture. We describe the circuit and layout design and the results of some experiments using the prototype.