Junjiroh Kikawa

Kelvin probe force microscopy study of surface potential transients in cleaved AlGaN∕GaN high electron mobility transistors

The surface potential of cleaved cross sections of AlGaN∕GaN high electron mobility transistors was measured by Kelvin probe force microscopy. For the bias conditions of Vgs=−5V and Vds=20V, the electric field was concentrated near the GaN∕SiC interface under the gate and between the gate and drain electrodes. A negative potential that decreased over time was observed in the GaN layer beginning 10min after the bias stress was removed. The transient surface potential was found to be well described by an exponential dependence with two time constants: 11 and 55s.

Vertical Schottky barrier diodes of α-Ga 2 O 3 fabricated by mist epitaxy

Ga2O3 possesses promising potential for power devices, supported by wide band gap of 4.9 eV (β-phase) and 5.3 eV (α-phase), as successfully demonstrated by Schottky barrier diodes (SBDs) and MOSFETs on β-Ga₂O₃ substrates. However, in terms of future industrial applications, cost and availability of large-scale β-Ga₂O₃ wafers as well as throughput of epitaxy technique might be issues to be overcome. We have proposed the use of sapphire substrates and mist epitaxy techniques for the growth, resulting in high-quality corundum-structured α-Ga₂O₃ as evidenced by the small FWHM values of X-ray diffraction rocking curves, for example, 23 arcsec. With the use of novel precursors and growth conditions, carbon contamination in the epilayers, which has been the severe problem in MOCVD, was below the detectable limit of SIMS. The surface was atomically flat with step and terrace structures, as shown by the AFM image. Excellent uniformity on 4-inch^φ sapphire wafer, lateral SBD, and MESFET have successively been demonstrated.

Thermal Analysis of AlGaN/GaN HFETs Using Electro-Thermal Simulation and Micro-Raman Spectroscopy

We report on investigation of self-heating effects in AlGaN/GaN HFETs (heterostructure field effect transistors) using numerical simulations and micro-Raman spectroscopy. In the numerical simulations, we used a temperature-dependent thermal conductivity for each constituent material. To reduce the size effect of the device, we added wide thermal diffusion regions to active device region. Both AlGaN/GaN HFETs on sapphire and SiC substrates were studied using both electro-thermal 2D (two-dimensional) simulations and also analytical 3D thermal simulations. Good agreements between the simulated and measured surface temperature distributions have been obtained, which supports the validity of simulation models. The simulated temperature distribution for HFETs on SiC substrates was found to have a much sharper peak than that on sapphire substrates. In addition, the region around the gate edge on the drain side usually showed a maximum temperature for the devices operating at drain voltages less than about 40 V, but this region shifted toward the drain side when the drain voltage was increased up to 50-80 V. These results show that micro-Raman spectroscopy can be used for high-resolution temperature measurements.

Detailed Investigation of GaN Metal-Insulator-Semiconductor Structures by Capacitance-voltage and Deep Level Transient Spectroscopy Methods

Interface states produced at the interface between an insulator and GaN semiconductor determine the performance of GaN metal-insulator-semiconductor (MIS) field effect transistors. Therefore, it is important to know details of interface states characteristics to improve device performances. For above purpose, we have fabricated GaN MIS capacitors, then carried out capacitance-voltage (CV) and deep level transient spectroscopy (DLTS) measurements, and analyzed the obtained results in detail.Wafers used in this study were n-type GaN grown on sapphire substrates by metal organic chemical vapor deposition. A film of SiN was deposited as an insulating layer using electron-cyclotron-resonance plasma-assisted deposition at room temperature, then samples were annealed at 400, 600 or 800°C in N2 atmosphere for 10 min.CV measurements were performed for all the samples at various frequencies and bias sweep rates in the dark condition. CV curves of all the samples exhibited ledges in the curves. Here, ledge indicates a region of which capacitance is independent of applied bias. Although each sample was annealed at each different temperature, it was observed at the same surface potential for all the samples. This result indicates that the Fermi level of the GaN/SiN interface is pinned by a particular trap. In addition, the shape of the CV curve depended on both frequency and bias sweep rate, and it was not observed in the results obtained by a quasi-static capacitance voltage measurement. This can be explained that the shape of ledge is determined by the quasi-equilibrium between a filling rate of traps and a bias sweep rate or test frequency. In the positive bias region of the ledge, a hysteresis window of the CV curve had some dependence on frequency but little dependence on bias sweep rate. On the other hand, in the negative bias region of the ledge, it had little dependence on frequency but obvious dependence on bias sweep rate. These dependences indicate two different traps and related to the ledge formation. The trap energy level related to the sweep rate dependence is estimated to be 0.34 eV by the temperature dependence of the width of hysteresis window. Deep level transient spectroscopy measurements were carried out to characterize the trap levels observed in the CV curves. Trap levels with activation energies of 0.32 and 0.78 eV were observed [1]. The former is almost equal to 0.34 eV obtained from the temperature dependence of the width of hysteresis window. The latter is similar to the interface trap reported by Nakano et al., which is considered to be originated from the complexes of Si and surface defect [2].[1] E. Shibata et al., Ext. Abstracts 2008 IMFEDK, Osaka, pp.69-70. (2008).[2] Y. Nakano and T. Jimbo, Appl. Phys. Lett. 80, 4756 (2002).

Correlation Between Resistivity and Yellow Luminescence Intensity of MOCVD-Grown GaN Layers

For further improvements in AlGaN/GaN heterojunction field-effect transistor performance (HFET), it is necessary to reduce the leakage current of the GaN buffer layer. We found a correlation between the leakage current and the intensity of the yellow luminescence of GaN layers taken by UV lamp excitation. The GaN layers were grown by metal organic chemical vapor deposition on SiC substrates. When the samples were excited by a UV (365 nm) lamp, visible yellow luminescence was observed. The leakage current of the GaN buffer layer was measured after deposition of ohmic metal contact. We confirmed clear correlation between the leakage current and the luminescence intensity based from result that the samples with the larger leakage current showed the stronger luminescence intensity. This correlation gives us useful information to understand the drain-source leakage current of AlGaN/GaN HFET.