K.C. Toh

Numerical computation of fluid flow and heat transfer in microchannels

Three-dimensional fluid flow and heat transfer phenomena inside heated microchannels is investigated. The steady, laminar flow and heat transfer equations are solved using a finite-volume method. The numerical procedure is validated by comparing the predicted local thermal resistances with available experimental data. The friction factor is also predicted in this study. It was found that the heat input lowers the frictional losses, particularly at lower Reynolds numbers. At lower Reynolds numbers the temperature of the water increases, leading to a decrease in the viscosity and hence smaller frictional losses.

A Global Mass Correction Scheme for the Level-Set Method

The level-set method is used to study the evolution of a bubble carried by a primary phase in (1) a straight channel, (2) a double-bend channel, and (3) a constricted channel. Special attention is given to the conservation of mass for the phases. A global mass correction scheme is proposed to ensure mass conservation. Surface tension effect is modeled using the continuum surface force approach. A finite-volume method is used to solve the governing equations. The CLAM schemes are used to model the convection of the level-set equations. The results compare well with the solutions of the volume-of-fluid (VOF) method.

Fabrication of Silicon Carriers With TSV Electrical Interconnections and Embedded Thermal Solutions for High Power 3-D Packages

This paper presents micro fabrication process and wafer-level integration of a silicon carrier, which consists of two Si chips that are bonded together with evaporated AuSn-solder. There are micro fins and channels fabricated in the Si chip and form the embedded cooling layer after bonding. The embedded cooling layer is connected with an inlet and an outlet to form a fluidic path for heat transfer enhancement. Besides, in the silicon carrier, there are through silicon vias (TSVs) with metal film on sidewall for electrical interconnection. Two or more carriers can then be stacked together with a silicon interposer in between to make up of a stacked cooling module for high power heat dissipation. The advantage of this 3-D stacking method is that it provides a method of simultaneously realizing electrical interconnection and fluidic path and it can extract heat from the constraints of 3-D silicon module chips to surface without external liquid circulation.

Integrated Liquid Cooling Systems for 3-D Stacked TSV Modules

In this paper, an integrated liquid cooling system for 3-D stacked modules with high dissipation level is proposed. The fluidic interconnects in this system are elaborated and the sealing technique for different fluid interfaces is discussed. Meanwhile, the pressure drop for each part of the system is analyzed. The optimized fluidic interconnects minimizing the pressure drop have been designed and fabricated, and the compact system is integrated. In line with the fluidic interconnect design and analysis, an experimental process for hydraulic characterization of the integrated cooling system is established. The pressure drops for different fluidic interconnects in this system are measured and compared with the analyzed results.

Pool boiling heat transfer enhancement by surface modification/micro-structures for electronics cooling: a review

Electronics cooling is an important aspect of the microelectronics and microsystem packaging. Liquid cooling involving boiling is emerging as main technique for high heat flux application. Primary issues related to boiling are wall temperature over shoot at boiling incipience and critical heat flux. Heat transfer enhancement has concerned the researchers and practitioners for many decades. This paper reviews experimental works done for boiling enhancement by surface modification and micro-machined structures. Boiling incipient temperature and critical heat flux by various techniques are analyzed. Aim of this review is to design a novel micro-machined structure to enhance boiling and integration of the structure with the chip for cooling 3D stacked module.

Development of Single Phase Liquid Cooling Solution for 3-D Silicon Modules

Demand for increased functionalities and the trend in product miniaturization have created new challenges for electronic packaging. The move to 3-D packages combines the benefits of small footprint packages and through-silicon-vias technology to overcome the limitations. However, thermal management of such packages has become the bottleneck as cooling solutions cannot access the intermediate stacks within the package. A single phase liquid microchannel cooling solution had been designed in this paper to overcome such limitations. First, the thermal resistances within the package had been identified using a 1-D thermal network. The interconnect and silicon substrate (carrier) thermal resistances have been found to be of the same order of magnitude. Flip chip with conductive underfill is chosen as the interconnect scheme balancing the thermal, mechanical, and electrical requirements. Flow distribution in the microchannels and their impact on the thermal performance were also analyzed numerically. A dual inlet, dual outlet microchannel heatsink design with a supply plenum tapering downstream was found to provide the most even flow distribution for removing the heat away from the die. A thermal resistance of 0.15 °C/W and lower temperature variation on die can be obtained with such a microchannel array arrangement. Lower hydraulic losses arising from the shorter flow length and lower mean velocities also allowed the integrated pumps to operate either at smaller sizes or higher flowrates. The methodology to derive the cooling solution is presented with due consideration to the silicon fabrication processes involved.

Thermal flow sensor for ultra-low velocities based on printed circuit board technology

This paper presents a new thermal flow sensor for ultra-low velocities. The sensor was fabricated with the standard printed circuit board (PCB) technology. The technology and the simple sensor design would reduce costs in fabrication and packaging. A one-dimensional analytical model is presented in order to understand the working principle and to optimize the sensitivity. A two-dimensional finite element analysis (FEA) model is also presented. The paper describes the experimental investigations of the temperature field around a heater under the influence of forced convection. The experimental and theoretical optimization results lead to the design of the PCB sensor whose characteristics are presented at the end of the paper. With the current calibration facility, the sensor is able to measure air flow velocities less than 80 mm s-1.

Fabrication of silicon carriers with TSV electrical interconnections and embedded thermal solutions for high power 3-D package

This paper presents micro fabrication process and wafer level integration of a silicon carrier, in which optimized liquid cooling layers are embedded. Two or more carriers can then be stacked together with a silicon interposer in between to make up of a stacked cooling module for high power heat dissipation. Wafer bonding are carried out with AuSn-solder which deposited by evaporation and the shear strength is higher than 27.2 MPa after bonding, which is high enough for application. The advantage of this 3-D stacking method is that it provides a method of simultaneous realizing electrical interconnection and fluidic path between two carriers and it can extract heat from the constraints of 3-D silicon module chips to surface without external liquid circulation.

Direct liquid cooling of a stacked multichip module

With the advances in microfabrication techniques and high performance chips, the heat flux from electronic components is reaching a point where air-cooling is unlikely to meet the cooling requirements for future generation computer chips. Direct single-phase liquid cooling of a stacked multichip module using FC-77 is examined in this paper. Three-dimensional numerical simulation is conducted to investigate the flow and the conjugated convection-conduction heat transfer in the cooling structure. The effects of the top clearance, the side clearance, flow rate, heating arrangement on the maximum chip temperature and velocity distribution are presented.

Modeling the Flows of Two Immiscible Fluids in a Three-Dimensional Square Channel Using the Level-Set Method

ABSTRACT A numerical solution of an annular two-phase flow in a square channel is presented. A combined formulation using only one set of conservation equations to treat both fluids is employed. The level-set (LS) method is used to capture the interface between the fluids. To overcome a weakness in the level-set method, the localized mass correction (LMC) scheme of [22] is applied to ensure mass conservation. The finite-volume method is used to solve the governing equations. Results are presented for two fluids of identical and different properties with two different inlet interface shapes. These results are compared with that of the volume-of-fluid (VOF) method and good agreement is achieved.