K. Vaccaro

Integration of magneto-optical garnet films by metal-organic chemical vapor deposition

This paper presents a novel technique for integrating yttrium iron garnets, namely Ce:YIG, onto semiconductor platforms using metal-organic chemical vapor deposition (MOCVD). Large amounts of cerium (Ce) could be incorporated into the garnet structure because of the nonequilibrium nature of the technique. The method can alloy up to 54% Ce, thereby increasing the refractive index and enhancing the Faraday rotation of the YIG films. Faraday rotations as high as 0.4/spl deg///spl mu/m at 1.3 /spl mu/m were achieved in MOCVD-grown garnets, exceeding the rotations of bismuth-doped YIG films (0.15/spl deg///spl mu/m at 1.3 /spl mu/m) grown by liquid-phase epitaxy. The easy axis of magnetization is within the plane of the films. When the garnet films were sputtered onto [100] magnesia (MgO) buffer layers, their hysteresis loops indicated that they were isotropic.

Indium phosphide passivation using thin layers of cadmium sulfide

The electrical properties of the silicon dioxide/n‐type (100) InP interface were significantly improved by thin interlayers of chemical bath deposited CdS. The CdS layer and CdS/InP interface were investigated with x‐ray photoelectron spectroscopy (XPS) and photoluminescence (PL). XPS data showed reduction of native oxides and the prevention of subsequent substrate oxide growth following CdS layer deposition. PL spectra, measured between 1.0 and 1.3 μm, indicate a reduction in phosphorus vacancies. Metal–insulator–semiconductor (MIS) capacitors fabricated with CdS‐treated InP substrates displayed interface‐state densities below 1×1011 eV−1 cm−2 when determined from the difference between the high‐ and low‐frequency capacitance data.

Analysis of thin CdS layers on InP for improved metal–insulator–semiconductor devices

Cadmium sulfide (CdS) layers were deposited from an aqueous solution of thiourea, cadmium sulfate, and ammonia on (100) n‐InP at 60–95 °C. X‐ray photoelectron spectroscopy showed that the deposition process effectively removes native oxides on InP and forms a protective layer for subsequent dielectric deposition. Surface analysis also showed that the InP surface is not P deficient following oxide deposition on CdS‐treated InP. Capacitance–voltage and conductance–voltage measurements of metal–insulator–semiconductor (MIS) capacitors were used to compare samples with and without CdS films between InP and a deposited insulator. Capacitance–voltage response of CdS‐treated MIS structures showed well‐defined regions of accumulation, depletion, and inversion. The interface‐state density at midgap was reduced from 5×1011 to 6×1010 eV−1 cm−2 with CdS treatment. Depletion‐mode MIS field‐effect transistors made using this new passivation technique exhibited superior device performance to that of untreated samples.

Optimization of Chemical Bath‐Deposited Cadmium Sulfide on InP Using a Novel Sulfur Pretreatment

A thiourea/ammonia pretreatment followed by chemical bath deposition of cadmium sulfide was used to passivate the surface of indium phosphide (100). The pretreatment was shown by X‐ray photoelectron spectroscopy to effectively remove native oxides from the InP surface and form an indium sulfide layer. The subsequent chemical bath deposition of CdS on a sulfur‐passivated surface forms a stable layer that protects the substrate from oxidation during chemical vapor deposition of . The passivation process was optimized for electrical response by varying the reactant concentrations of the chemical bath. Reflection high‐energy electron‐diffraction (RHEED) analysis showed that the pretreatment results in a (1 × 1) surface, which reconstructs to (2 × 1) after heating in vacuo to 200°C. RHEED and atomic force microscopy showed an increase in CdS surface roughness with increasing thickness corresponding to the formation of oriented surface asperities. CdS‐passivated metal‐insulator‐semiconductor diodes exhibited a density of interface states of when calculated by the high‐low method, more than one order of magnitude lower than the of untreated metal‐insulator‐semiconductor samples. A CdS layer thickness of ~ 10 A was determined to yield optimal capacitance‐voltage response for all CdS deposition conditions investigated.

Cadmium sulfide surface stabilization for InP-based optoelectronic devices

Thin layers of chemical bath deposited cadmium sulfide were used to improve the surface and interface properties of InP and its latticed-matched III-V compounds. X-ray photoelectron spectroscopy indicates chemical reduction of surface oxides and the prevention of subsequent group III or V oxide formation. Photoluminescence spectra, measured between 1.0 and 1.3 μm, indicate a dramatic reduction in phosphorus vacancies following CdS treatment. Metalinsulator-semiconductor capacitors fabricated onn-type InP substrates with CdS interlayers display near-ideal quasi-static response and interface-state densities in the low 1011/eVcm2 range. Thin CdS layers were used to passivate the surface of InAlAs/InGaAs high electron mobility transistors (HEMTs) and metal-semiconductor-metal (MSM)photodetectors.AfterCdS treatment, Schottky diode barrier heights of 0.6 eV were regularly obtained. For HEMTs, drain-togate current ratios of 8 × 104 were observed after CdS treatment. For a new backside illuminated MSM design, the dark current of CdS-treated samples was reduced three orders of magnitude to below 1 nA.

Low‐temperature chemical vapor deposition of SiO2 at 2–10 Torr

We discuss a new low‐pressure and low‐temperature process for the chemical vapor deposition (CVD) of silicon dioxide. The process differs from conventional low‐pressure CVD in that lower temperatures (150–300 °C) and a unique pressure window (2–10 Torr) provide the conditions for the reaction of silane (SiH4) and oxygen. In this thermal process, activation energies of 0.15–0.18 eV and deposition rates of 100 A/min at 250 °C are achieved. This technique is approximately 15 times less sensitive to the O2:SiH4 ratio than atmospheric pressure CVD. The deposition conditions are compatible with both low‐temperature silicon and III‐V technologies. Preliminary current‐voltage and capacitance‐voltage measurements on Si indicate dielectric field strength of 3–8×106 V/cm and fixed oxide charge density (Qss) less than 1011 cm−2.

Optoelectronic properties of transition metal and rare earth doped epitaxial layers on InP for magneto-optics

Rare earth-and transition metal-doped thin films of InP, In0.53Ga0.47As, and In0.71Ga0.29As0.58P0.42 were grown by liquid phase epitaxy and evaluated for use in integrated electro-optical and magneto-optical applications, such as waveguides and Faraday rotators. The films were lattice matched to (100) InP substrates, and the transition metal (Mn) and rare earth (Gd, Eu, and Er) doping concentra-tions were between 2.6 × 1018 and 1.5 × 1020 cm-3. The chemical profiles were generally found to be homogeneous by SIMS, although in more highly doped films the rare earths were observed to segregate toward the interfaces. The undoped films were n-type, and the net carrier concentrations in the rare earth-doped (Gd, Eu, Er) films were decreased by an order of magnitude. The Mn-doped films were p-type. Optically, the rare earth dopants were observed to raise the refractive index of the layers at 632.8 nm, and subsequent waveguiding in doped InP layers was observed at 1.3 μm. Although the Faraday rotations of our materials were much less than that of well known oxides, such as yttrium iron garnet, they were sufficient for device applications, and our materials can be much more easily integrated with InP OEIC devices. For example, a 1 cm waveguide would provide the large rotation (45°) required in isolator applica-tions.

Structural and Electrical Properties of Low‐Temperature, Low‐Pressure SiO2 on Si

The physical and electrical properties of SiO 2 deposited on Si at low pressure -2-10 Torr) and low temperature (100-300°C) are reported. Fourier transform infrared spectroscopy (FTIR) is used to examine the chemical nature of the deposited oxide as a function of deposition and anneal temperature. Films deposited at T<200°C reveal partially oxidized silicon along with water and silanol groups. As the deposition temperature is raised to 300°C, the FTIR spectra resemble that of thermal oxide. Annealing of films deposited at lower temperatures significantly improves the films, also causing the FTIR peaks to resemble those of thermal oxide. Capacitance-voltage measurements are used to extract fixed-charge and interface-state densities. Fixed-charge densities below 1×10 11 cm −2 and interface-state densities 5×10 10 cm −2 eV −1 are obtained after rapid thermal annealing of SiO 2 on SI

Epilayer transfer for integration of III-V photodetectors onto a silicon platform using Au-Sn and Pd-Ge bonding

A novel process to bond InP-based, substrate-removed, vertical Schottky photodetectors to a commercially available silicon read-out integrated circuit is demonstrated as a new technique for optoelectronic hybridization. High-quality In(Al)GaAs epilayers were bonded to silicon substrates and patterned to form a 320/spl times/256 focal plane array to demonstrate this technique. The epilayers were joined to the silicon through a metal-metal bond of either Au-Sn or Ge-Pd. Scanning electron and optical microscopy revealed that the Au-Sn formed a eutectic (melting) bond, whereas the Ge-Pd formed a solid-state bond. Samples bonded with Ge-Pd exhibited superior performance and were easier to process than the Au-Sn samples. Using this bonding technique, samples with a dark current density of 595 pA//spl mu/m/sup 2/ at -5 V and a peak responsivity of 0.21 A/W over /spl lambda/=0.8 to 1.5 /spl mu/m were obtained. Bonded devices survived severe thermal cycling between 77 K and 373 K. The process described is uncomplicated and does not require any specialized equipment beyond that of a standard photolithography tool.

Inverted, substrate-removed MSM and Schottky diode optical detectors

The InGaAs metal-semiconductor-metal (MSM) photodetector is a high-performance component for lightwave communication systems. Low capacitance, dictated by finger spacing, and high carrier drift velocity result in GHz operating bandwidths. Efficient optical absorption to 1.7 /spl mu/m results in high responsivity at the wavelengths preferred for optical fiber communications, 1.3 and 1.5 /spl mu/m. Simple processing steps make the MSM practical for monolithic integration with low-noise, high electron mobility transistor (HEMT) receiver amplifiers and other opto-electronic circuit applications.