Stephen M. Spaziani

Indium phosphide passivation using thin layers of cadmium sulfide

The electrical properties of the silicon dioxide/n‐type (100) InP interface were significantly improved by thin interlayers of chemical bath deposited CdS. The CdS layer and CdS/InP interface were investigated with x‐ray photoelectron spectroscopy (XPS) and photoluminescence (PL). XPS data showed reduction of native oxides and the prevention of subsequent substrate oxide growth following CdS layer deposition. PL spectra, measured between 1.0 and 1.3 μm, indicate a reduction in phosphorus vacancies. Metal–insulator–semiconductor (MIS) capacitors fabricated with CdS‐treated InP substrates displayed interface‐state densities below 1×1011 eV−1 cm−2 when determined from the difference between the high‐ and low‐frequency capacitance data.

Cadmium sulfide surface stabilization for InP-based optoelectronic devices

Thin layers of chemical bath deposited cadmium sulfide were used to improve the surface and interface properties of InP and its latticed-matched III-V compounds. X-ray photoelectron spectroscopy indicates chemical reduction of surface oxides and the prevention of subsequent group III or V oxide formation. Photoluminescence spectra, measured between 1.0 and 1.3 μm, indicate a dramatic reduction in phosphorus vacancies following CdS treatment. Metalinsulator-semiconductor capacitors fabricated onn-type InP substrates with CdS interlayers display near-ideal quasi-static response and interface-state densities in the low 1011/eVcm2 range. Thin CdS layers were used to passivate the surface of InAlAs/InGaAs high electron mobility transistors (HEMTs) and metal-semiconductor-metal (MSM)photodetectors.AfterCdS treatment, Schottky diode barrier heights of 0.6 eV were regularly obtained. For HEMTs, drain-togate current ratios of 8 × 104 were observed after CdS treatment. For a new backside illuminated MSM design, the dark current of CdS-treated samples was reduced three orders of magnitude to below 1 nA.

Epilayer transfer for integration of III-V photodetectors onto a silicon platform using Au-Sn and Pd-Ge bonding

A novel process to bond InP-based, substrate-removed, vertical Schottky photodetectors to a commercially available silicon read-out integrated circuit is demonstrated as a new technique for optoelectronic hybridization. High-quality In(Al)GaAs epilayers were bonded to silicon substrates and patterned to form a 320/spl times/256 focal plane array to demonstrate this technique. The epilayers were joined to the silicon through a metal-metal bond of either Au-Sn or Ge-Pd. Scanning electron and optical microscopy revealed that the Au-Sn formed a eutectic (melting) bond, whereas the Ge-Pd formed a solid-state bond. Samples bonded with Ge-Pd exhibited superior performance and were easier to process than the Au-Sn samples. Using this bonding technique, samples with a dark current density of 595 pA//spl mu/m/sup 2/ at -5 V and a peak responsivity of 0.21 A/W over /spl lambda/=0.8 to 1.5 /spl mu/m were obtained. Bonded devices survived severe thermal cycling between 77 K and 373 K. The process described is uncomplicated and does not require any specialized equipment beyond that of a standard photolithography tool.

Inverted, substrate-removed MSM and Schottky diode optical detectors

The InGaAs metal-semiconductor-metal (MSM) photodetector is a high-performance component for lightwave communication systems. Low capacitance, dictated by finger spacing, and high carrier drift velocity result in GHz operating bandwidths. Efficient optical absorption to 1.7 /spl mu/m results in high responsivity at the wavelengths preferred for optical fiber communications, 1.3 and 1.5 /spl mu/m. Simple processing steps make the MSM practical for monolithic integration with low-noise, high electron mobility transistor (HEMT) receiver amplifiers and other opto-electronic circuit applications.

ELECTRICAL CHARACTERIZATION OF CDS PASSIVATION ON INP

InP surface passivation has been realized by a convenient chemical bath deposition (CBD) of a thin CdS layer. For comparison, samples without any treatments and/or with only a thin SiO2 layer were also prepared. Also studied was the effect of a thin layer of SiO2 deposited immediately after the CdS deposition. Schottky contacts were made on the CdS-passivated InP by electron-beam deposition of Ti/Au. Electrical characterization was conducted by current-voltage (I-V) and current-voltage-temperature (I-V-T) measurements. It was found that the electrical performance of the Schottky contacts of the CdS-passivated InP samples was improved significantly. The thickness (deposition time) of the CdS strongly affects the device electrical performance. The additional SiO2-on-CdS layer plays a key role in the process of InP surface passivation. Post-treatment in the CdS deposition process also strongly affects the surface morphology and electrical properties. Surface morphology studied by atomic force microscopy (AFM) indicates that the surface roughness increased after CdS deposition, though the degree of roughness is reverse proportional to the CdS process time. X-ray photoelectron spectroscopy (XPS) shows that the CdS layer protects the InP substrate during the oxide deposition.

Backside illumination processing technology for InGaAs/lnAlAs/lnP photofets and MSMs

Abstract Despite the theoretical and demonstrated advantages of numerous discrete devices for electro-optical systems applications, integration remains a challenge. In particular, highly agile integration strategies, fully optimized device structures, and processing protocols have yet to be developed. Many of the unique processing and packaging constraints imposed by standard electro-optical circuit fabrication are overcome by the novel substrate removal process reported here. We demonstrate an InGaAs/ InAlAs/InP MSM and photofet process advance which lends itself generally to integration of dissimilar materials and device designs, and is applicable to many other component types. Passivation techniques for the frontside and backside are explored for optimized discrete components as well as integrated devices. Detector performance is seen to increase by 35x for the MSM detectors, and we have obtained responsivity of more than 2.5 A/W for the photofets. The bonding and substrate removal process allows polylithic integration with various surrogate substrates.

Cadmium sulfide surface stabilization and Schottky barrier enhancement for InP based optoelectronic devices

We have investigated the use of CdS interlayers grown by chemical bath deposition (CBD). We have deposited CdS on a wide variety of III-V semiconductors. We found that native oxides were reduced by the CdS treatment. CdS-treated and untreated HEMTs and metal-semiconductor-metal photodetectors (MSMs) were compared. Thin 50 /spl Aring/ layers were effective in reducing gate and surface leakage. The thin CdS layers reduced the gate leakage of InA1As/InGaAs HEMTs and the dark current of InA1As/InGaAs optical detectors. X-ray photoelectron spectroscopy indicates a reduction of surface oxides and the prevention of subsequent group III or V oxide formation. Backside processing of InGaAs/lnA1As MSMs allows complete coverage of the mesas. The CBD process for depositing CdS is inherently adaptable to a wide range of optoelectronic device processes.

Inverted, substrate-removed vertical Schottky diode optical detectors

The InGaAs metal-semiconductor-metal (MSM) photodetector has great potential as a high-performance component for future lightwave communication systems and opto-electronic integrated circuits (OEICs). Low capacitance, dictated by finger spacing, and high carrier drift velocity should result in GHz operating bandwidths. Efficient optical absorption to 1.7 /spl mu/m results in high responsivity at the wavelengths preferred for optical fiber communications, 1.3 and 1.55 /spl mu/m. Although significant efforts have been devoted to the realization of InGaAs MSM photodetectors, few devices have found their way into commercial or military products. Among the technical problems still hindering the practical incorporation of InGaAs MSMs into optical systems and networks are their high dark current and the slow response of photo-generated holes. High dark current results from low Schottky barrier heights and poor surface passivation. The problem is compounded for devices with submicron finger spacing since the surface electric fields are very high. Analysis of carrier dynamics shows holes generated deep in the depletion region can significantly degrade the high-frequency response. For these reasons we have chosen to investigate new designs for vertical Schottky diode detectors.

Characterization of semiconducting thin films on InP for magneto-optical applications

We have investigated the properties of thin film magneto-optical materials grown in the III-V materials system. These materials can be used to expand the functionality of InP opto-electronic integrated circuits (OEIC). Magneto-optical (MO) materials possess unique properties which have already found applicability (in bulk form) in optical systems such as isolators, waveguides, and switches. The materials in this study are epitaxial InGaAs, InGaAsP, and InP films lattice-matched to InP substrates. These films were doped with Mn or Eu with concentrations of 1.3/spl times/10/sup 20/ and 1.5/spl times/10/sup 20/ cm/sup -3/, respectively. The optical and electrical properties of these films agree with expected values, and they show promise for MO applications. In addition, waveguiding has been achieved in InGaAsP films.

Electrical characterization of CdS passivation on InP

InP surface passivation has been realized by a convenient chemical bath deposition (CBD) of a thin CdS layer. For comparison, samples without any treatment and with only a thin SiO/sub 2/ layer were also prepared. Also studied was the effect of a thin layer of SiO/sub 2/ deposited immediately after the CdS deposition. Schottky contacts were made on the CdS-passivated InP by electron-beam deposition of Ti/Au. Electrical characterization was conducted by current-voltage (I-V) measurements. It was found that the electrical performance of the Schottky contacts of the CdS-passivated samples was improved significantly. The thickness (deposition time) of the CdS strongly affects the device electrical performance. The additional SiO/sub 2/-on-CdS layer plays a key role in the process of InP surface passivation. Post-treatment in the CdS deposition process also significantly improves the surface morphology and electrical properties.