K. Vershinin
De Montfort University
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Publication
Featured researches published by K. Vershinin.
IEEE Transactions on Electron Devices | 2004
S. Hardikar; R. Tadikonda; D.W. Green; K. Vershinin; E.M.S. Narayanan
High-voltage lateral diffused metal-oxide semiconductor (LDMOS) transistors with a variation in the lateral doping (VLD) of drift regions are demonstrated in junction isolation technology using a fully implanted CDMOS process. The VLD profile is realized by using an analytical approach reported previously. The analytical model is verified through simulations and experiment. Results indicate that higher breakdown voltages can be achieved for a given drift length using a VLD profile in comparison to uniform doping while offering a good tradeoff between breakdown voltage and specific on-resistance.
international electron devices meeting | 2006
P. Moens; Filip Bauwens; Joris Baele; K. Vershinin; E. DeBacker; E.M. Sankara Narayanan; M. Tack
Record performance of a novel power transistor integrated in a 0.35 μm power IC technology is reported. Measured specific on-state resistance of 33 mOhm*mm2 for a 94 V breakdown is breaking the silicon-limit and is the lowest reported value to date. The device outperforms its nearest rival by a factor of 2.5. The device consists of the stacking of a vertical MOS on a fully depleted vertical drift layer, leading to a high cell density
IEEE Electron Device Letters | 2003
S. Hardikar; R. Tadikonda; M. Sweet; K. Vershinin; E.M.S. Narayanan
An ultrafast low energy loss lateral insulated gate bipolar transistor (LIGBT) with a novel segmented anode structure is demonstrated. The anode comprises segments of p/sup +/ and n/sup +//p (n/sup +/ region formed within a p-type region) along the width of the device. By simply varying the ratio of these segments the tradeoff between conduction and switching losses can be varied. Unlike an anode shorted structure this does not exhibit an undesirable snapback in its on-state characteristics. This structure is simple to realize in a CDMOS process without the need for any additional process steps.
IEEE Transactions on Electron Devices | 2005
N. Luther-King; M. Sweet; O. Spulber; K. Vershinin; M.M. De Souza; E.M.S. Narayanan
Reverse blocking MOS controlled devices will enable high efficiency ac-ac matrix converter systems to replace dc-linked type circuits. The trend in bidirectional switches is to replace the combination of a unidirectional blocking device and a diode with a monolithic reverse blocking device only. The diode on-state loss is eliminated, part count is reduced, and the system is less bulky. This paper discusses the various reverse blocking concepts suitable for MOS controlled devices for high voltage matrix converter applications. They include the junction isolation, the trench isolation, and the anode-gated (AG) concepts. AG is the only concept not technologically limited beyond 1200 V. However, increasing drift region thickness with voltage rating necessitates innovations to achieve fast switching and low losses without compromising V/sub ce(sat)/. Herein we propose the high channel density concept to further improve the efficiency of AG devices. Simulation results indicate the concept drastically reduces turnoff losses and improve switching speed.
international symposium on power semiconductor devices and ic's | 2006
K. Vershinin; M. Sweet; L. Ngwendson; J. Thomson; P. Waind; J. Bruce; E.M. Sankara Narayanan
For the first time, we present experimental results of a trench clustered IGBT structures fabricated in 1.2kV non-punch-through technology. Experimental results demonstrate significantly low forward voltage drop in comparison to trench IGBTs in the same technology. Furthermore, results show that the use of dummy cells in the TCIGBT device can improve the trade-off between the on-state and turn-off losses
IEEE Transactions on Power Electronics | 2007
D.W. Green; K. Vershinin; M. Sweet; E.M.S. Narayanan
Significant effort has been placed in anode engineering for the insulated gate bipolar transistor (IGBT) as a method to enhance the on-state/switching loss tradeoff. For the first time, we have taken a comprehensive selection of these designs and individually implemented them all into a 1200 V vertical structure. It is shown that all passive anode engineering structures lie on or above a forward voltage drop/inductive turn-off loss tradeoff curve which can also be generated through changing the emitter (anode) Gummel number of a conventional IGBT. Tradeoff enhancement can be achieved through the use of active anode structures. Such structures incorporate an additional gate at the anode and are considered in the study. The influence of lifetime on the tradeoff is considered and it is shown that optimum device performance can be achieved through both control of the lifetime and the emitter Gummel number/anode engineering. The relative shift in the tradeoff curve is also considered for optimum device design. Furthermore, the effect of the tradeoff curve on the total power loss with varying switching frequency and duty cycle is also discussed. high temperature operation, it is shown that the shift must be carefully considered for optimum device design. Furthermore, the effect of the tradeoff curve on the total power loss with varying switching frequency and duty cycle is also discussed.
international symposium on power semiconductor devices and ic's | 2007
P. Moens; F. Bauwens; B. Desoete; J. Baele; K. Vershinin; H. Ziad; E.M. Shankara Narayanan; M. Tack
Experimental data are shown for integrated smart power transistors breaking the silicon limit at 100 V. The performance is close to the much lower super-junction limit for the given device pitch. The device uses standard trench technology, and is implemented in a 0.35 μm smart power process. Key steps to improve the device performance yielding a record performance of 30 mOhm*mm2 for a Vbd of 94 V, are highlighted in the paper.
IEEE Transactions on Electron Devices | 2005
D.W. Green; M. Sweet; K. Vershinin; S. Hardikar; E.M.S. Narayanan
The performance of a high-voltage lateral insulated gate bipolar transistor (LIGBTs) with segmented n+p/n anode fabricated in junction isolation technology is experimentally investigated at both room and elevated temperatures. Detailed two dimensional numerical modeling of a vertical representation of the structure shows that significant electron current passes through the n/sup +/p/n segment of the anode region during the on-state and when devices are subjected to clamped inductive switching. It is shown that the magnitude of electron current can be controlled by modifying the p-base charge which enables enhancement of the turn-off loss/forward voltage drop tradeoff in comparison to conventional LIGBTs.
IEEE Transactions on Electron Devices | 2005
D.W. Green; S. Hardikar; R. Tadikonda; M. Sweet; K. Vershinin; E.M.S. Narayanan
Performance of multichannel lateral insulated gate bipolar transistors (MC-LIGBTs) fabricated in a cost-effective, fully implanted, CDMOS-compatible process in junction isolation technology is reported. Due to the presence of additional MOS cathode cells, the MC concept enables a reduction in the forward voltage drop. Furthermore, the MC concept is combined with the segmented N/sup +/P/P/sup +/ anode (SA-NPN) concept in an LIGBT structure. The SA-NPN anode concept reduces turnoff losses due to a reduction in injection of holes and from the collection of electrons by the narrow base-collector shorted NPN bipolar transistor formed at the anode. It is shown that combining the MC and the SA-NPN Anode concepts creates a device that exhibits both low on-state and turnoff losses and thus best placed for use in power IC applications.
international symposium on power semiconductor devices and ic's | 2007
Dinesh Kumar; M. Sweet; K. Vershinin; Luther Ngwendson; E.M.S. Narayanan
A new, three terminal, reverse conducting trench clustered IGBT (RC-TCIGBT) is proposed and evaluated using numerical simulations in 1200 V, non-punch through (NPT) technology. This device is a monolithic integration of an anti- parallel thyristor (APT) in the TCIGBT (O. Spulber, et. al., December 2000), (K. Vershinin, et. al., June 2006). This approach does not increase device area and ensures snap-back free operation in the first (Ist) and third (IIIrd) quadrants. Moreover, it is shown that the RC-TCIGBT which belongs to the class of MOS bipolar devices with controlled thyristor action, can provide excellent Vce (sat)/Eoff trade-off and soft reverse recovery.