Kanak Datta

Ballistic transport characteristic of ingaas quantum well surface channel MOSFET including effects of physical device parameter

In this paper, impact of device & process parameter variation on quantum ballistic Current-Voltage (I-V) characteristics of a surface channel, High K stack gate Quantum Well MOSFET is simulated. Physical device parameters like channel thickness, gate dielectric thickness and process parameters like doping density have direct effects on quantum ballistic current. We use mode space approach with NEGF formalism to simulate Current-Voltage (I-V) characteristics. Short Channel effects (SCE) are studied from the simulation for these variations. Observed effect is scaling dielectric & channel thickness results in better subthreshold slope & Drain induced barrier lowering at the cost of On-current. By increasing doping concentration, ballistic current can be improved. However with increasing doping density, SCE effects are compromised.

An Accurate Current Model for III–V Field Effect Transistors Using a Novel Concept of Effective Transmission Coefficient

In this work, we investigate the transport phenomena in compound semiconductor material based buried channel Quantum Well MOSFET with a view to developing a simple and effective model for the device current. Device simulation has been performed in quantum ballistic regime using non-equilibrium Greens function (NEGF) formalism. The simulated current voltage characteristics using a novel concept of effective transmission coefficient has been found to define the reported experimental data with high accuracy. The proposed model has also been effective to capture the transport characteristics reported for other compound semiconductor material based field effect transistors. The concept of the proposed effective transmission coefficient and hence the model lends itself to be a simple and powerful device analysis tool which can be extensively used to predict the performance of a wide variety of compound semiconductor devices in the pre fabrication stage. It has also demonstrated consistency with device characteristics for doping concentration and channel length scaling. Thus the model can help the device or process engineers to tune the devices for the best possible performance.

Simulation of thin-TFETs using transition metal dichalcogenides: effect of material parameters, gate dielectric on electrostatic device performance

In recent years, significant of scientific research effort has focused on the investigation of transition metal dichalcogenides (TMDC) and other two-dimensional (2D) materials like graphene or boron nitride. Theoretical investigation on the physical aspects of these materials has revealed a whole new range of exciting applications due to wide tunability in electronic and optoelectronic properties. Besides theoretical exploration, these materials have been successfully implemented in electronic and optoelectronic devices with promising results. In this work, we have investigated the effect of monolayer TMDC materials and monolayer TMDC alloys on the performance of thin tunneling field-effect transistors or thin-TFETs. These are promising electronic devices that can achieve steep switching characteristics. We have used the self-consistent determination of the conduction and valence band levels in the device and a simplified model of interlayer tunneling current reported in recent literature that treats scattering semiclassically and incorporates the energy broadening effect using a Gaussian approximation . We have also explored the effect of gate dielectric material variation, interlayer dielectric variation, top gate metal workfunction on the performance of the device. Our study shows that proper choice of material in the top and bottom layers, optimization of materials used as gate and interlayer dielectric are necessary to extract the full potential of these devices. The electron affinity and bandgap of the TMDCs used in different layers effectively control the threshold voltage and current in the device. As seen from our simulation, interlayer materials with high dielectric constant can degrade subthreshold device performance, increase threshold voltage, whereas lowering interlayer thickness could increase device ‘on’ current at the expense of degraded subthreshold performance.

Capacitance-voltage(C-V) characteristics of InGaAs/InAs/InGaAs quantum well MOSFET

In this work, the Capacitance-Voltage (C-V) characteristics of a In_xGa_1-xAs/InAs/In_xGa_1-xAs Quantum-Well (QW) MOSFET is investigated. 1D coupled Schrodinger-Poisson equations are solved self consistently by Finite Element Method (FEM) using COMSOL coupled with MATLAB to extract the charge density profile and Capacitance-Voltage profile. Effects of strain in the In_xGa_1-xAs/InAs/In_xGa_1-xAs Quantum-Well channel are also investigated. At the same time, effects of various device and process parameters like dielectric material, channel thickness and doping density on the C-V characteristics are also explored. The extracted C-V profile is also compared with the results obtained using SILVACO ATLAS.

Capacitance-Voltage characteristics of In x Ga 1−x As Surface Channel Quantum Well MOSFET: Impact of doping concentration & dielectric material

In this paper, the Capacitance-Voltage (C-V) characteristics of high-k stack, arsenide based surface channel Quantum Well MOSFET were investigated. Self-consistent simulation was done by solving coupled Schrödinger-Poisson equation taking wave function penetration into oxide. Experimental C-V and a simulated band diagram of the Surface Channel Quantum Well MOSFET are available in recent literature. However, a self consistent simulation of C-V characterization is yet to be done. We studied the variation of C-V characteristics with some important parameters like oxide material, doping concentration in this work.

Quantum ballistic simulation study of In 0.7 Ga 0.3 As/InAs/In 0.7 Ga 0.3 As Quantum Well MOSFET

In this work, quantum ballistic simulation study of a novel III-V In_0.7Ga_0.3As/InAs/In_0.7Ga_0.3As Quantum Well MOSFET is presented. To simulate the device in quantum ballistic regime, nonequilibrium Greens function formalism has been used. 2D Poisson and Schrodinger equations are solved in self-consistent manner taking into account 2D electrostatics and other quantum mechanical effects. Strong carrier confinement in the In_0.7Ga_0.3As/InAs/In_0.7Ga_0.3As quantum well allows the application of efficient mode space approach in quantum ballistic simulation. Simulation results for the QW device with 30 nm gate length are reported. At the same time, effect of gate length variation on the quantum ballistic characteristics is explored.

Capacitance-Voltage characterization and semiclassical transport analysis of In x Ga 1−x As surface channel Quantum Well MOSFET

In this paper, the Capacitance-Voltage (C-V) and Ballistic Current characteristics of arsenide based surface channel Quantum Well (QW) MOSFET were investigated. Self-consistent simulation was performed by solving coupled Schrödinger-Poisson equation incorporating wave function penetration into oxide. Although Experimental C-V and I-V characteristics of the Surface Channel QW MOSFET are available in recent literature, a self-consistent simulation based C-V and I-V characterization is yet to be reported. We studied some important parameters variation like oxide material, doping concentration and their impacts on C-V characteristics. We have also simulated carrier transport in the Ballistic limit using top of the barrier approach.

Quantum ballistic simulation study of InGaAs/InAs/InGaAs quantum well MOSFET: Effects of doping and physical device parameters

In this work, simulation study of device parameter variation on quantum ballistic Current-Voltage (I-V) characteristics of a In0.7Ga0.3As/InAs/In0.7Ga0.3As Quantum Well (QW) MOSFET is presented. Doping density and various physical device parameters like channel thickness, gate dielectric thickness affect ballistic performance of nanoscale transistors. To simulate Current-Voltage (I-V) characteristics in quantum ballistic regime, nonequilibrium Greens function formalism (NEGF) has been used. In this work, the effect of device parameters on subthreshold and short channel performance is also demonstrated. It is observed that scaling of gate dielectric material and channel thickness could provide better electrostatic control at the expense of ballistic device current. However ballistic current can be improved by increasing doping density.

In x Ga 1−x as surface channel quantum well MOSFET: Quantum ballistic simulation using mode space approach

In this paper, I-V characteristics of High k stack InGaAs surface channel Quantum Well MOSFET were simulated using Matlab. To simulate the device in quantum ballistic regime we used non equilibrium Greens function formalism. Self-consistent solution of Schrodinger-Poisson equation was performed using FDM method taking 2D electrostatics into account. The charge is well confined in the quantum well. So, mode space approach is applicable & efficient. Simulation results for the Quantum Well device with 55nm gate length have been reported. Variation of I-V characteristics with the change in channel length has also been reported.