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Dive into the research topics where Ehsanur Rahman is active.

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Featured researches published by Ehsanur Rahman.


international conference on electrical and control engineering | 2014

Ballistic transport characteristic of ingaas quantum well surface channel MOSFET including effects of physical device parameter

Abir Shadman; Ehsanur Rahman; Sudipta Romen Biswas; Kanak Datta; Quazi D. M. Khosru

In this paper, impact of device & process parameter variation on quantum ballistic Current-Voltage (I-V) characteristics of a surface channel, High K stack gate Quantum Well MOSFET is simulated. Physical device parameters like channel thickness, gate dielectric thickness and process parameters like doping density have direct effects on quantum ballistic current. We use mode space approach with NEGF formalism to simulate Current-Voltage (I-V) characteristics. Short Channel effects (SCE) are studied from the simulation for these variations. Observed effect is scaling dielectric & channel thickness results in better subthreshold slope & Drain induced barrier lowering at the cost of On-current. By increasing doping concentration, ballistic current can be improved. However with increasing doping density, SCE effects are compromised.


Nanotechnology | 2018

A physically based compact I–V model for monolayer TMDC channel MOSFET and DMFET biosensor

Ehsanur Rahman; Abir Shadman; Imtiaz Ahmed; Saeed Uz Zaman Khan; Quazi D. M. Khosru

In this work, a compact transport model has been developed for monolayer transition metal dichalcogenide (TMDC) channel MOSFET. The analytical model solves the Poissons equation for the inversion charge density to get the electrostatic potential in the channel. Current is then calculated by solving the drift-diffusion equation. The model makes gradual channel approximation to simplify the solution procedure. The appropriate density of states obtained from the first principle density functional theory simulation has been considered to keep the model physically accurate for monolayer TMDC channel FET. The outcome of the model has been benchmarked against both experimental and numerical quantum simulation results with the help of a few fitting parameters. Using the compact model, detailed output and transfer characteristics of monolayer WSe2 FET have been studied, and various performance parameters have been determined. The study confirms excellent ON and OFF state performances of monolayer WSe2 FET which could be viable for the next generation high-speed, low power applications. Also, the proposed model has been extended to study the operation of a biosensor. A monolayer MoS2 channel based dielectric modulated FET is investigated using the compact model for detection of a biomolecule in a dry environment.


Journal of Nanoelectronics and Optoelectronics | 2017

An Accurate Current Model for III–V Field Effect Transistors Using a Novel Concept of Effective Transmission Coefficient

Ehsanur Rahman; Abir Shadman; Sudipta Romen Biswas; Kanak Datta; Quazi D. M. Khosru

In this work, we investigate the transport phenomena in compound semiconductor material based buried channel Quantum Well MOSFET with a view to developing a simple and effective model for the device current. Device simulation has been performed in quantum ballistic regime using non-equilibrium Greens function (NEGF) formalism. The simulated current voltage characteristics using a novel concept of effective transmission coefficient has been found to define the reported experimental data with high accuracy. The proposed model has also been effective to capture the transport characteristics reported for other compound semiconductor material based field effect transistors. The concept of the proposed effective transmission coefficient and hence the model lends itself to be a simple and powerful device analysis tool which can be extensively used to predict the performance of a wide variety of compound semiconductor devices in the pre fabrication stage. It has also demonstrated consistency with device characteristics for doping concentration and channel length scaling. Thus the model can help the device or process engineers to tune the devices for the best possible performance.


international conference on electron devices and solid-state circuits | 2015

Capacitance-voltage(C-V) characteristics of InGaAs/InAs/InGaAs quantum well MOSFET

Kanak Datta; Sudipta Romen Biswas; Ehsanur Rahman; Abir Shadman; Quazi D. M. Khosru

In this work, the Capacitance-Voltage (C-V) characteristics of a In<sub>x</sub>Ga<sub>1-x</sub>As/InAs/In<sub>x</sub>Ga<sub>1-x</sub>As Quantum-Well (QW) MOSFET is investigated. 1D coupled Schrodinger-Poisson equations are solved self consistently by Finite Element Method (FEM) using COMSOL coupled with MATLAB to extract the charge density profile and Capacitance-Voltage profile. Effects of strain in the In<sub>x</sub>Ga<sub>1-x</sub>As/InAs/In<sub>x</sub>Ga<sub>1-x</sub>As Quantum-Well channel are also investigated. At the same time, effects of various device and process parameters like dielectric material, channel thickness and doping density on the C-V characteristics are also explored. The extracted C-V profile is also compared with the results obtained using SILVACO ATLAS.


international conference on electron devices and solid-state circuits | 2015

In x Ga Ux As surface channel, quantum well MOSFET: Electrostatic analysis by self consistent CV characterization incorporating strain effects

Abir Shadman; Ehsanur Rahman; Kanak Darta; Sudipta Romen Biswas; Quazi Deen Mohd. Khosra

In this paper, We simulate Capacitance-Voltage (C-V) characteristics of a arsenide based surface channel Quantum Well MOSFET. Coupled Schrodinger-Poisson equation was solved self-consistently taking into consideration of wave function penetration and strain effects. Experimental C-V and a simulated band diagram of the Surface Channel MOSFETs are available in recent literature. However, simulation of C-V characteristics is yet to be done self consistently. We studied the variation of C-V characteristics with channel thickness. We also compared the device performance by adding a layer of more compressive In x Ga 1−x As(x>0.53) layer with the strain free undoped In 0 . 53 Ga 0 . 47 As channel of the structure.


international conference on electron devices and solid-state circuits | 2014

Capacitance-Voltage characteristics of In x Ga 1−x As Surface Channel Quantum Well MOSFET: Impact of doping concentration & dielectric material

Ehsanur Rahman; Abir Shadman; Sudipta Romen Biswas; Kanak Datta; Quazi D. M. Khosru

In this paper, the Capacitance-Voltage (C-V) characteristics of high-k stack, arsenide based surface channel Quantum Well MOSFET were investigated. Self-consistent simulation was done by solving coupled Schrödinger-Poisson equation taking wave function penetration into oxide. Experimental C-V and a simulated band diagram of the Surface Channel Quantum Well MOSFET are available in recent literature. However, a self consistent simulation of C-V characterization is yet to be done. We studied the variation of C-V characteristics with some important parameters like oxide material, doping concentration in this work.


international conference on electrical and control engineering | 2014

Quantum ballistic simulation study of In 0.7 Ga 0.3 As/InAs/In 0.7 Ga 0.3 As Quantum Well MOSFET

Sudipta Romen Biswas; Kanak Datta; Abir Shadman; Ehsanur Rahman; Quazi D. M. Khosru

In this work, quantum ballistic simulation study of a novel III-V In<sub>0.7</sub>Ga<sub>0.3</sub>As/InAs/In<sub>0.7</sub>Ga<sub>0.3</sub>As Quantum Well MOSFET is presented. To simulate the device in quantum ballistic regime, nonequilibrium Greens function formalism has been used. 2D Poisson and Schrodinger equations are solved in self-consistent manner taking into account 2D electrostatics and other quantum mechanical effects. Strong carrier confinement in the In<sub>0.7</sub>Ga<sub>0.3</sub>As/InAs/In<sub>0.7</sub>Ga<sub>0.3</sub>As quantum well allows the application of efficient mode space approach in quantum ballistic simulation. Simulation results for the QW device with 30 nm gate length are reported. At the same time, effect of gate length variation on the quantum ballistic characteristics is explored.


international conference on electrical and control engineering | 2014

Capacitance-Voltage characterization and semiclassical transport analysis of In x Ga 1−x As surface channel Quantum Well MOSFET

Ehsanur Rahman; Abir Shadman; Kanak Datta; Sudipta Romen Biswas; Quazi D. M. Khosru

In this paper, the Capacitance-Voltage (C-V) and Ballistic Current characteristics of arsenide based surface channel Quantum Well (QW) MOSFET were investigated. Self-consistent simulation was performed by solving coupled Schrödinger-Poisson equation incorporating wave function penetration into oxide. Although Experimental C-V and I-V characteristics of the Surface Channel QW MOSFET are available in recent literature, a self-consistent simulation based C-V and I-V characterization is yet to be reported. We studied some important parameters variation like oxide material, doping concentration and their impacts on C-V characteristics. We have also simulated carrier transport in the Ballistic limit using top of the barrier approach.


ieee international conference on semiconductor electronics | 2014

Quantum ballistic simulation study of InGaAs/InAs/InGaAs quantum well MOSFET: Effects of doping and physical device parameters

Sudipta Romen Biswas; Kanak Datta; Ehsanur Rahman; Abir Shadman; Quazi D. M. Khosru

In this work, simulation study of device parameter variation on quantum ballistic Current-Voltage (I-V) characteristics of a In0.7Ga0.3As/InAs/In0.7Ga0.3As Quantum Well (QW) MOSFET is presented. Doping density and various physical device parameters like channel thickness, gate dielectric thickness affect ballistic performance of nanoscale transistors. To simulate Current-Voltage (I-V) characteristics in quantum ballistic regime, nonequilibrium Greens function formalism (NEGF) has been used. In this work, the effect of device parameters on subthreshold and short channel performance is also demonstrated. It is observed that scaling of gate dielectric material and channel thickness could provide better electrostatic control at the expense of ballistic device current. However ballistic current can be improved by increasing doping density.


ieee international conference on semiconductor electronics | 2014

In x Ga 1−x as surface channel quantum well MOSFET: Quantum ballistic simulation using mode space approach

Ehsanur Rahman; Abir Shadman; Sudipta Romen Biswas; Kanak Datta; Quazi D. M. Khosru

In this paper, I-V characteristics of High k stack InGaAs surface channel Quantum Well MOSFET were simulated using Matlab. To simulate the device in quantum ballistic regime we used non equilibrium Greens function formalism. Self-consistent solution of Schrodinger-Poisson equation was performed using FDM method taking 2D electrostatics into account. The charge is well confined in the quantum well. So, mode space approach is applicable & efficient. Simulation results for the Quantum Well device with 55nm gate length have been reported. Variation of I-V characteristics with the change in channel length has also been reported.

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Abir Shadman

Bangladesh University of Engineering and Technology

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Quazi D. M. Khosru

Bangladesh University of Engineering and Technology

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Kanak Datta

Bangladesh University of Engineering and Technology

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Sudipta Romen Biswas

Bangladesh University of Engineering and Technology

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Imtiaz Ahmed

Bangladesh University of Engineering and Technology

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Kanak Darta

Bangladesh University of Engineering and Technology

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Quazi Deen Mohd. Khosra

Bangladesh University of Engineering and Technology

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Saeed Uz Zaman Khan

Bangladesh University of Engineering and Technology

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