Karen Holloway

Tantalum as a diffusion barrier between copper and silicon: Failure mechanism and effect of nitrogen additions

The interaction of Cu with Si separated by thin (50 nm) layers of tantalum, Ta2N, and a nitrogen alloy of Ta has been investigated to determine the factors that affect the success of these materials as diffusion barriers to copper. Intermixing in these films was followed as a function of annealing temperature by in situ resistance measurements, Rutherford backscattering spectra, scanning electron microscopy, and cross‐section transmission electron microscopy. Ta prevents Cu‐silicon interaction up to 550 °C for 30 min in flowing purified He. At higher temperatures, copper penetration results in the formation of η‘‐Cu3Si precipitates at the Ta‐Si interface. Local defect sites appear on the surface of the sample in the early stages of this reaction. The Ta subsequently reacts with the substrate at 650 °C to form a planar hexagonal‐TaSi2 layer. Ta silicide formation, which does not occur until 700 °C in a Ta‐Si binary reaction couple, is accelerated by the presence of Cu. Nitrogen‐alloyed Ta is a very similar...

Tantalum as a diffusion barrier between copper and silicon

We have investigated the effectiveness and failure mechanism of thin tantalum layers as diffusion barriers to copper. 50 nm tantalum films were sputtered onto unpatterned single‐crystal 〈100〉 Si wafers and overlaid with 100 nm Cu. Material reactions in these films were followed as a function of annealing temperature by in situ resistance measurements, and characterized by Rutherford backscattering spectroscopy and cross‐section transmission electron microscopy. While pure Cu on Si reacts at 200 °C, the Ta film prevents Cu silicon interaction up to 600 °C. At higher temperatures, reaction of the Si substrate with Ta forms a planar layer of hexagonal TaSi2. Cu rapidly penetrates to the Si substrate, forming η‘‐Cu3Si precipitates at the Ta‐Si2‐Si interface.

Comparison of high vacuum and ultra‐high‐vacuum tantalum diffusion barrier performance against copper penetration

We demonstrate that depositing Ta diffusion barriers under ultra‐high vacuum conditions without in situ oxygen dosing allows for variations both in microstructure and in the concentration of chemical impurities that severely degrade barrier performance. The effects of deposition pressure, in situ oxygen dosing at interfaces, hydrogen and oxygen contamination, and microstructure on diffusion barrier performance to Cu diffusion for electron‐beam deposited Ta are presented. 20 nm of Ta diffusion barrier followed by a 150 nm Cu conductor were deposited under ultra‐high vacuum (UHV, deposition pressure of 1×10−9 to 5 ×10−8 Torr) and high vacuum (HV, deposition pressure of 1×10−7 to 5×10−6 Torr) conditions onto 〈100〉 Si. In situ resistance furnace measurements, Auger compositional depth profiling, secondary ion mass spectrometry, and forward recoil detection along with scanning and transmission electron microscopy were used to determine the electrical, chemical, and structural changes that occurred in thin‐film...

Crystallographic texture change during abnormal grain growth in Cu‐Co thin films

The addition of 0.4–8.6 at. % Co to Cu thin films strongly influences the temperature evolution of microstructure, stress, and resistivity. For concentrations near 1 at. % Co in coevaporated Cu‐Co on oxidized Si, normal grain growth begins at about 75 °C, about 50 °C lower than in pure Cu. There is an abrupt decrease in resistivity and stress at a temperature which increases with Co content from 120 °C (0% Co) to 250 °C (8.6 at. % Co), and coincides with precipitation of Co within Cu grains. A dramatic change in texture is observed in both coevaporated and electroplated Cu‐Co films upon annealing above 250 °C. As‐deposited films have a three‐component texture of (111) fiber, (200) fiber, and random but annealed films have a dominant (200) fiber texture. This ‘‘cube’’ texture differs from the dominant (111) texture of annealed pure Cu, and appears to be coupled to an abnormal grain growth process since many grains are observed to be larger than ten times the film thickness. It is proposed that segregation ...

Ultraclean, integrated processing of thermal oxide structures

Ultraclean, integrated metal‐oxide‐semiconductor oxide fabrication has been investigated for the first time by combining (i) surface cleaning in inert ambient, (ii) wafer transfer through ultrahigh vacuum, and (iii) thermal oxidation in an ultrahigh vacuum‐based reactor. Device quality oxide structures are obtained (evidenced by dielectric breakdown characteristics for Al gate capacitors) under suitable conditions, while under other circumstances chemical mechanisms severely degrade electrical performance; even in ultraclean environments, impurity‐related Si etching reactions before oxidation degrade oxide quality, but this can be avoided by appropriate use of passivating oxide films which prevent roughness associated with etching.

Effect of Oxygen Exposure and Deposition Environment on Thermal Stability of Ta Barriers To Cu Penetration.

The effect of deposition pressure and controlled oxygen dosing on the diffusion barrier performance of thin film Ta to Cu penetration was investigated. In-situ resistivity, Auger compositional profiling, scanning electron microscopy and cross-sectional transmission electron microscopy were used to determine the electrical, chemical and structural changes that occur in Cu/Ta bilayers on Si upon heating. A 20 nm Ta barrier allowed the penetration of Cu at temperatures ranging from 320 to 630°C depending on processing conditions. Barrier failure temperature is dependent upon the deposition pressure and oxygen contamination at the Ta/Cu interface. This indicates the importance of understanding how deposition conditions affect diffusion barrier performance.

Use of print-simulations in accelerated yield learning for 22nm BEOL technology

Back-end-of-line (BEOL) patterning defects on logic circuits are challenging to find and often involve lengthy wafer processing times and costly failure analysis resources to detect. A print-simulation tool was developed to predict patterning fails of such circuits. Validity of the simulator was verified independently through hardware data. Layout constructs of a functional logic circuit were simulated and potential weak spots that were susceptible to patterning fail were identified. Patterning solutions were put in place to address these fails. Independent test-structures were designed to electrically test for pattern fidelity of some of these constructs early in the process flow to provide faster feedback. Test results from these test-structures indicated that any potential gross patterning issues have been resolved for the identified design constructs before mask order. Yield learning methodologies like this significantly shortened the cycle of learning of the 22nm BEOL process.

Structure of an amorphous TiSi alloy formed by thermal reaction

Abstract The amorphous nature of a-Ti 60 Si 40 formed by interdiffusion of sputtered TiSi multilayers has been confirmed by the calculation of a radial distribution function (RDF) from scattering patterns obtained by electron diffraction. This material shows the characteristics of an amorphous metallic alloy with a coordination number of 11.4. The atomic pair distribution function shows some similarity to the crystalline silicide closest to it in composition — Ti 5 Si 4 . The likely presence of chemical short-range order in the alloy is consistent with the driving force for the formation of the amorphous state by interdiffusion in the TiSi system, which is the formation of TiSi bonds.