Nestor A. Bojarczuk

Thermally evaporated Cu2ZnSnS4 solar cells

High efficiency Cu2ZnSnS4 solar cells have been fabricated on glass substrates by thermal evaporation of Cu, Zn, Sn, and S. Solar cells with up to 6.8% efficiency were obtained with absorber layer thicknesses less than 1 μm and annealing times in the minutes. Detailed electrical analysis of the devices indicate that the performance of the devices is limited by high series resistance, a “double diode” behavior of the current voltage characteristics, and an open circuit voltage that is limited by a carrier recombination process with an activation energy below the band gap of the material.

Atomic beam deposition of lanthanum- and yttrium-based oxide thin films for gate dielectrics

We report on the electrical and microstructural characteristics of La- and Y-based oxides grown on silicon substrates by ultrahigh vacuum atomic beam deposition, in order to examine their potential as alternate gate dielectrics for Si complementary metal oxide semiconductor technology. We have examined the issues of polycrystallinity and interfacial silicon oxide formation in these films and their effect on the leakage currents and the ability to deposit films with low electrical thickness. We observe that polycrystallinity in the films does not result in unacceptably high leakage currents. We show significant Si penetration in both types of films. We find that the interfacial SiO2 is much thicker at ∼1.5 nm for the Y-based oxide compared to the La-based oxide where the thickness is <0.5 nm. We also show that while the Y-based oxide films show excellent electrical properties, the La based films exhibit a large flat band voltage shift indicative of positive charge in the films.

ULTRAVIOLET AND VIOLET GAN LIGHT EMITTING DIODES ON SILICON

We report the fabrication and characterization of GaN-based double heterostructure light emitting diodes grown by molecular beam epitaxy on Si(111) substrates. Light emitting diode operation is achieved by using the conducting Si(111) substrate as a backside n contact and a standard transparent Ni/Au p contact. We observe electroluminescence peaked in the ultraviolet ∼360 nm, with a full width at half maximum of ∼17 nm and in the violet at ∼420 nm. Electron microscopy studies indicate a high density of threading and planar defects. Consequences of these are discussed.

Control of an interfacial MoSe2 layer in Cu2ZnSnSe4 thin film solar cells: 8.9% power conversion efficiency with a TiN diffusion barrier

We have examined Cu2ZnSnSe4 (CZTSe) solar cells prepared by thermal co-evaporation on Mo-coated glass substrates followed by post-deposition annealing under Se ambient. We show that the control of an interfacial MoSe2 layer thickness and the introduction of an adequate Se partial pressure (PSe) during annealing are essential to achieve high efficiency CZTSe solar cells—a reverse correlation between device performance and MoSe2 thickness is observed, and insufficient PSe leads to the formation of defects within the bandgap as revealed by photoluminescence measurements. Using a TiN diffusion barrier, we demonstrate 8.9% efficiency CZTSe devices with a long lifetime of photo-generated carriers.

Robustness of ultrathin aluminum oxide dielectrics on Si(001)

The stability of Al2O3 films during thermal processing will help determine their usefulness as an alternative gate dielectric for advanced complementary metal-oxide-semiconductor devices. We used medium energy ion scattering and atomic force microscopy to examine the degradation of ultrathin Al2O3 layers under ultrahigh vacuum annealing and the effects of low-temperature oxidation. No degradation is observed at 900 °C, but voids appear at higher temperatures. Growth of interfacial SiO2 takes place during low-pressure oxidation at 600 °C, which may limit the capacitance of extremely thin structures.

Comparison of high vacuum and ultra‐high‐vacuum tantalum diffusion barrier performance against copper penetration

We demonstrate that depositing Ta diffusion barriers under ultra‐high vacuum conditions without in situ oxygen dosing allows for variations both in microstructure and in the concentration of chemical impurities that severely degrade barrier performance. The effects of deposition pressure, in situ oxygen dosing at interfaces, hydrogen and oxygen contamination, and microstructure on diffusion barrier performance to Cu diffusion for electron‐beam deposited Ta are presented. 20 nm of Ta diffusion barrier followed by a 150 nm Cu conductor were deposited under ultra‐high vacuum (UHV, deposition pressure of 1×10−9 to 5 ×10−8 Torr) and high vacuum (HV, deposition pressure of 1×10−7 to 5×10−6 Torr) conditions onto 〈100〉 Si. In situ resistance furnace measurements, Auger compositional depth profiling, secondary ion mass spectrometry, and forward recoil detection along with scanning and transmission electron microscopy were used to determine the electrical, chemical, and structural changes that occurred in thin‐film...

High temperature stability of Al2O3 dielectrics on Si: Interfacial metal diffusion and mobility degradation

We have examined the stability of Al2O3/Si heterostructures and show that significant Al diffusion occurs into the silicon for temperatures of 1000 °C and more. This may be caused by dissociation of small quantities of Al2O3 and subsequent dissolution of the Al into the silicon. Such diffusion may be reduced, though not eliminated via an interfacial silicon oxynitride diffusion barrier. Using long channel metal gate Al2O3/Si n field effect transistor data, we show that anneals at 1000 °C result in a degradation of the electron mobility by a factor of 2.

Band-Edge High-Performance High-k/Metal Gate n-MOSFETs Using Cap Layers Containing Group IIA and IIIB Elements with Gate-First Processing for 45 nm and Beyond

We have fabricated electrically reliable band-edge (BE) high-k/metal nMOSFETs stable to 1000degC, that exhibit the highest mobility (203 cm2/Vs @ 1MV/cm) at the thinnest Tinv (1.4 nm) reported to date. These stacks are formed by capping HfO2 with ultra-thin layers containing strongly electropositive gp. IIA and IIIB elements (e.g. Mg and La), prior to deposition of the TiN/Poly-Si electrode stack, in a conventional gate-first flow. Increasing the cap thickness tunes the Vt/V fb from a midgap position to BE while maintaining high mobility and good PBTI. The addition of La can enhance the effective k value of the dielectric stack, resulting in EOTs < 1nm. Short channel devices with band edge characteristics are demonstrated down to 60 nm. Finally, possible mechanisms to explain the nFET Vt shift are discussed

High-quality aluminum oxide gate dielectrics by ultra-high-vacuum reactive atomic-beam deposition

We demonstrate the potential for ultrathin aluminum-oxide films as alternate gate dielectrics for Si complementary metal–oxide–semiconductor technology. Films are deposited in ultrahigh vacuum utilizing atomic beams of aluminum and oxygen on Si(100) surfaces. We show device-quality Si(100)/Al2O3 interfaces with interfacial trap densities in the 1010 cm−2 eV−1 range, and with leakage current densities five orders of magnitude lower than what is observed in SiO2 insulators at the same equivalent electrical thickness. As-grown films possess an amorphous-to-microcrystalline structure, depending upon the deposition temperature, and any interfacial layers between the Si(100) and Al2O3 layer are <∼0.5 nm.

Examination of flatband and threshold voltage tuning of HfO2∕TiN field effect transistors by dielectric cap layers

The authors have examined the role of sub nanometer La2O3 and LaN cap layers interposed in Si∕HfO2∕TiN high-k gate dielectric stacks in tuning the flatband and threshold voltages of capacitors and transistors. High performance, band edge n metal oxide field effect transistors with channel lengths down to 60nm may be fabricated without significant compromise in mobility, electrical thickness, and threshold voltage. They have carried out a microstructural evaluation of these stacks and correlated these results with the electrical behavior of the devices.