Karl Otto Dohnke

BIFET – a Novel Bipolar SiC Switch for High Voltage Power Electronics

The driving force for the use of SiC in high voltage switches is the potential benefit from considerably reduced static losses and reduced number of devices in serial connection compared with Si-IGBTs. As an appropriate design for high voltage applications we choose a bipolar normally-on JFET structure (so called BIFET, Bipolar Injection FET), which promises additional advantages in a serial connection in a “supercascode” circuit. Simulations of such BIFETs for an aimed blocking voltage of 4.5 kV and minority carrier lifetimes between 0.5 μs and 5 μs demonstrate a reduction of the static loss by more than 25 % compared to the unipolar JFET for the same blocking voltage. Experimentally achieved forward characteristics of BIFETs show a forward voltage of less than 6 V at 70 A/cm2 and Tj = 150°C. The breakdown of these first BIFETs exhibits an avalanche-like behaviour at 2.5 kV , i.e. approximately 70 % of the planar breakdown. The dynamic performance was investigated in a cascode configuration in a chopper circuit with a clamped inductive load. Introduction The demand for devices able to block several kilovolts is still increasing. In power distribution systems, e.g., today many single switches are connected in series in order to obtain high blocking voltages. Another trend is the fact that the users prefer IGBT like switches with powerless voltage control despite their deficiencies of lower blocking voltage compared with thyristors or GTO’s. The requirements typical for these applications are at least several 100 Amps, so that parallel connection of switches becomes mandatory. The driving force for the use of SiC in high voltage switches is the potential benefit from considerably reduced static losses and reduced number of devices in the serial connection. Above 4 kV the power loss should be less in bipolar than in unipolar SiC switches because of the bipolar conductivity modulation. The task of developing bipolar switches, however is not easy to solve since for bipolar SiC switches physical parameters like minority carrier lifetime and its adjustment are a challenge of design and technology. A simple transfer from experience with silicon won’t work. In silicon, state of the art bipolar switches like IGBTs utilise a p-type substrate. However, using the available p-type SiC substrates, all advantages from conductivity modulation gained from bipolar effects are overcompensated by the high resistivity of the substrate (s. Fig.1: VFsubstrate = 5,25 V). Using n-type substrates will overcome this situation, but in consequence the drift zone needs to be p-type, where the carrier transport properties and defect density are today less analysed compared with n type layers. Therefore one has to look for an high emitter efficiency and a suited lifetime management in order to efficiently modulate the drift zone conductivity . Materials Science Forum Online: 2004-06-15 ISSN: 1662-9752, Vols. 457-460, pp 1245-1248 doi:10.4028/www.scientific.net/MSF.457-460.1245

Large Area, Avalanche-Stable 4H-SiC PiN Diodes with VBR > 4.5 kV

Large area 4H-SiC PIN diodes have been fabricated which exhibit a stable avalanche ranging between 4.5 and 5.5 kV. The avalanche occurs at an electrical field strength of 2.1 MV/cm at the pn junction. The temperature coefficient of the avalanche is positive (0.3 V/K). The avalanche is tested in DC mode. The device concept as well as the fabrication process is described in detail. Static and dynamic characteristics are shown.

High-Voltage Modular Switch Based on SiC VJFETs - First Results for a Fast 4.5kV/1.2Ω Configuration

The success of high voltage SiC switching devices is curr ently retarded by not solved questions regarding the technology of bipolar devices and th e available material quality which does not allow the fabrication of large area chips. High cur rents, however, are mandatory for most of the targeted application in energy distribution or traction. T hus, a unipolar high voltage switch based on a serial connection of vertical JFETs is presented. T his concept comprises the advantage of paralleling in order to achieve high currents and the fas t switching behavior of majority carrier devices. It is controlled by a simple silicon low volt age power transistor at low side (source connected to ground). Theoretically a 12kV device with less than 1Ω resistance for fast switching above 10kHz can be realized using existing 3kV SiC VJFETs. F irst results for a 4.5kV configuration with an on-resistance of 1.2 Ω are presented. The transient analysis reveals the ab ility to switch extremely fast. The devices are placed in an appropriate p ckage designed for applications up to 9kV. Switches utilizing the full capability of the package w ill be realized in a next step. Introduction Silicon carbide devices can revolutionize the field of high voltage (>3kV) solid state switching technology. Compared to silicon solutions (IGBT’s, GTO’ s, etc., stacked or in single configuration), considerable improvements for static and dynamic losses can be achieved. Moreover, by using SiC devices the physical limit for the blocking voltage of a single device can be theoretically shifted to values much higher than 10kV. However, in this applications , high power, e.g. high currents are mandatory. Since the quality of commercially available SiC wafers does not allow reasonable active areas above 10mm2 today, suited devices must be able to be conn cted parallel. This holds in general for unipolar devices because of their positive temperature coefficient. This work presents a new approach for a modular high volta ge SiC switching device based on the unipolar SiC VJFET / Si cascode system as presented earl ier [1]. Device concept In order to enlarge blocking voltage capability, the casc ode [3] can be extended by a serial connection of an arbitrary number of VJFETs with the gate connected to the proceeding stage or ground potential, respectively, via a commercial silicon diode capable of avalanche at a certain blocking voltage (see Fig.1). The approach is similar to t he serial connection of MOSFETs [2], however, the realization presented here is simpler and h s much less restrictions than the MOSFET arrangement. The complete device works like a three term inal switch with source, drain and gate. Like the simple cascode it can be controlled easily by a low voltage Si-MOSFET at low side. This is an important advantage compared to conventional solutions for erial connection of high voltage switches, where individual gate control at different vol tage levels is essential for each single stage. The presented system can be theoretically extended to a ny blocking voltage of choice. It should be Materials Science Forum Online: 2003-09-15 ISSN: 1662-9752, Vols. 433-436, pp 793-796 doi:10.4028/www.scientific.net/MSF.433-436.793

Optimization of Bipolar SiC-Diodes by Analysis of Avalanche Breakdown Performance

In this work we discuss measurements of the breakdown voltage of diodes with non-punch-through (NPT)- and punch-through (PT)-designs. From the experimental results we deduce the temperature dependent Fulop constants of the effective ionization rate. The data of this work agree very well with ionization rates for electrons and holes determined recently.

To Be ''Snappy'' or Not - a Comparison of the Transient Behaviours of Bipolar SiC-Diodes

Introduction Though advanced electronic devices of conventional semiconductor materials are very successfully used in industrial applications like power management, t he availability of such components will touch limits because of increasing demands for high te mperature and high frequency capabilities in advanced circuits. Therefore, power electr oni s engineering has to seek new solutions as developed by the silicon carbide (SiC) technology. S the superior switching behaviour of silicon carbide devices can be the pushing key in e stablishing SiC technology with advanced components even in high power management. Considerable improvements for static and dynamic losses have been achieved in bipolar high voltage SiC diodes [1-6]. The greatest challenge in all these efforts is the mat rial quality of wafers and epitaxial layers, which limits current capability and yield of such devices with respect to the chip area. Paralleling of small area devices is one way to com pensate for the defect density limiting the yield. However, much more attention should be paid to the chara cterise the diodes in switching experiments with an appropriate rate of current decay and DC link voltages in order to optimise the n-base thickness and doping to exploit the full volta ge capability without snappy effects.

Bipolar Degradation of 6.5 kV SiC pn-Diodes: Result Prediction by Photoluminescence

The stability of 6.5 kV pn-diodes is dependent on the absence of critical crystal defects, such as basal plane dislocations. In this paper, we present a method to detect these defects on wafer level by utilizing photoluminescence (PL). The PL scan is performed immediately after epitaxy and also after the implantation process steps with subsequent high temperature annealing. The analysis of both scans enables the prediction of devices that will drift due to bipolar degradation, and devices that will exhibit non-drifting behaviour. To validate this PL scanning technique, forward bias electrical stress tests have been performed on the fabricated 6.5 kV pn-diodes.

A Molded Package Optimized for High Voltage SiC-Devices

We present first results on power cycling of 6.5 kV SiC PiN-diodes mounted into a molded package. The geometry of this lateral package was designed to fulfill the specifications of the electrical isolation and the creepage distances in the high voltage region of 6.5 kV. To evaluate the suitability of this package we used high voltage SiC PiN-diodes. The diodes were soldered onto a copper lead frame, wire bonded and covered by molding compound. The packaged diodes were characterized by electrical measurements before and during a power cycling test with a temperature swing of 90 K. These results showed long term stable behavior of the I-V characteristics of the diodes as well as the suitability of the package for high temperature and high voltage application of SiC devices.

Characterization of Packaged 6.5 kV SiC PiN-Diodes up to 300 °C

Silicon Carbide bipolar diodes offer unique ultrafast switching behavior for high voltage and high power applications [1]. But due to the small chip size it is required to parallel a lot of dice and therefore it is necessary to get detailed information about the electrical and thermal behavior of single diodes. For the characterization in the full current and voltage regime we have developed a molded leadframe package. The package was designed with a lateral contact geometry and a high creepage distance of 20 mm, which enable us to characterize these diodes for high voltage applications. Forward and reverse I-V characteristics and turn-off behavior under hard switching conditions up to 300 °C are reported. Additionally the forward voltage stability and power cycling tests are discussed.

TLS-Dicing for SiC - Latest Assessment Results

With the gaining demand for SiC semiconductor devices it is more and more challenging to meet the requirements for SiC volume production with the state of the art wafer dicing technology. In order to overcome this challenge the laser based dicing technology Thermal Laser Separation (TLS-DicingTM) was assessed for SiC volume production within the European project SEA4KET. This paper presents the key results of this project. It could be demonstrated that the demand of SiC volume production regarding throughput and cost as well as edge quality and electrical performance of diced chips can be met with TLS-DicingTM.

History and Recent Developments of Packaging Technology for SiC Power Devices

Packaging plays an important role to allow the full potential of silicon carbide devices to be realised. The physical properties of silicon carbide will allow devices to operate with junction temperatures well above 200 °C, but today standard-packaged SiC products are limited to a maximum junction temperature of 175 °C. The limitation lies in the packaging, because a power device package is a complex structure consisting of many components of different materials and with correspondingly different thermal properties. As such, the assembly technologies define both the performance and lifetime of discrete packages and power modules. In this paper we give an insight of packaging technology for SiC devices from the beginning in the mid-1980s through to the state-of-the-art of today. In addition, new packaging technologies to enable power SiC devices to operate up to 200 °C are discussed.