Kazuhisa Fujimoto

A high performance GaAs MMIC transceiver for personal handy phone system (PHS)

A high performance GaAs MMIC transceiver has been developed for the Personal Handy phone System (PHS), Japans digital cordless telephone system. The MMIC includes a T/R switch, a Low Noise Amplifier (LNA) and a Power Amplifier (PA), which offers significant advantages in RF performance in comparison with silicon devices. In receive mode, the power gain and the noise figure including T/R switch are 15 dB and 2.4 dB, respectively. In transmit mode, the MMIC including T/R switch exhibits an overall power added efficiency (PAE)-of 25.5% and produces an output power of 21 dBm with an adjacent channel leakage power (Padj) of ¿56.2 dBc (600 kHz offset) at 1.9 GHz for ¿/4-shift QPSK modulated signal. A very small chip size of 1.0 mm × 2.7 mm is also realized. This is one of the smallest GaAs MMICs that have been reported with the same functionality.

0.4-8 GHz broadband MMICs in novel RF chip size package for optical video distribution system

0.4-8 GHz broadband MMICs in the novel RF chip size package (RF-CSP) have been developed for the optical video distribution system. By using anisotropic conductive film (ACF) for the flip-chip bonding, fabrication process of RF-CSP becomes very simple and cost effective. This RF-CSP is one of the smallest packages ever reported.

A low power dissipation 0.4∼7 GHz transimpedance amplifier IC for SCM optical communication system

Abstract A low power dissipation and broadband transimpedance amplifier IC has been developed for sub-carrier multiplexing (SCM) optical communication systems such as a multi-channel video signal transmission system. A 0.25xa0μm pseudomorphic double-heterojunction modulation-doped FET (MODFET) is adopted for the IC to achieve the required bandwidth and noise performance. Specifically, transimpedance gain of 52 dBΩ with equivalent input noise current of 12 pA/√Hz has been obtained between 0.4–7 GHz. In order to minimize the group delay (GD) deviation, a peaking control technique is investigated. We also adopted the flip-chip bonding method to reduce the parasitic elements. As a result, group delay deviation of less than 30 ps has been obtained. A novel SrTiO 3 (STO) capacitor process technology is incorporated to realize low power dissipation. By using integrated STO capacitors for DC blocking, single power-supply voltage of 5xa0V and power dissipation of 300 mW are realized. This power dissipation is less than one half of that required by conventional transimpedance amplifiers.