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Dive into the research topics where Kazuki Nakada is active.

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Featured researches published by Kazuki Nakada.


IEEE Transactions on Neural Networks | 2003

An analog CMOS central pattern generator for interlimb coordination in quadruped locomotion

Kazuki Nakada; Tetsuya Asai; Yoshihito Amemiya

This paper proposes a neuromorphic analog CMOS controller for interlimb coordination in quadruped locomotion. Animal locomotion, such as walking, running, swimming, and flying, is based on periodic rhythmic movements. These rhythmic movements are driven by the biological neural network, called the central pattern generator (CPG). In recent years, many researchers have applied CPG to locomotion controllers in robotics. However, most of these have been developed with digital processors and, thus, have several problems, such as high power consumption. In order to overcome such problems, a CPG controller with analog CMOS circuit is proposed. Since the CMOS transistors in the circuit operate in their subthreshold region and under low supply voltage, the controller can reduce power consumption. Moreover, low-cost production and miniaturization of controllers are expected. We have shown through computer simulation, such circuit has the capability to generate several periodic rhythmic patterns and transitions between their patterns promptly.


IEEE Transactions on Circuits and Systems | 2005

Analog CMOS implementation of a CNN-based locomotion controller with floating-gate devices

Kazuki Nakada; Tetsuya Asai; Yoshihito Amemiya

This paper proposes an analog CMOS circuit that implements a central pattern generator (CPG) for locomotion control in a quadruped walking robot. Our circuit is based on an affine transformation of a reaction-diffusion cellular neural network (CNN), and uses differential pairs with multiple-input floating-gate (MIFG) MOS transistors to implement both the nonlinearity and summation of CNN cells. As a result, the circuit operates in voltage mode, and thus it is expected to reduce power consumption. Due to good matching accuracy of devices, the circuit generates stable rhythmic patterns for robot locomotion control. From experimental results on fabricated chip using a standard CMOS 1.5-/spl mu/m process, we show that the chip yields the desired results; i.e., stable rhythmic pattern generation and low power consumption.


Intelligent Automation and Soft Computing | 2004

DESIGN OF AN ARTIFICIAL CENTRAL PATTERN GENERATOR WITH FEEDBACK CONTROLLER

Kazuki Nakada; Tetsuya Asai; Yoshihito Amemiya

Abstract This paper proposes an approach to design of an artificial central pattern generator (CPG) with a feedback control loop. CPG is the biological neural network that generates rhythmic movements for locomotion of animals. A crucial point in designing of an artificial CPG controller is how to deal with sensory information on surrounding environrnents. Hence, we investigated the properties of an artificial CPG controller including sensory feedback. First, we analyzed the stability of the CPG controller, and then how a sensory feedback influences to the output of the controller. The results provide a realistic approach to design of an artificial CPG controller.


International Journal of Neural Systems | 2006

ANALOG VLSI IMPLEMENTATION OF RESONATE-AND-FIRE NEURON

Kazuki Nakada; Tetsuya Asai; Hatsuo Hayashi

We propose an analog integrated circuit that implements a resonate-and-fire neuron (RFN) model based on the Lotka-Volterra (LV) system. The RFN model is a spiking neuron model that has second-order membrane dynamics, and thus exhibits fast damped subthreshold oscillation, resulting in the coincidence detection, frequency preference, and post-inhibitory rebound. The RFN circuit has been derived from the LV system to mimic such dynamical behavior of the RFN model. Through circuit simulations, we demonstrate that the RFN circuit can act as a coincidence detector and a band-pass filter at circuit level even in the presence of additive white noise and background random activity. These results show that our circuit is expected to be useful for very large-scale integration (VLSI) implementation of functional spiking neural networks.


international symposium on neural networks | 2005

Analog current-mode CMOS implementation of central pattern generator for robot locomotion

Kazuki Nakada; Tetsuya Asai; Tetsuya Hirose; Yoshihito Amemiya

We propose an analog current-mode central pattern generator (CPG). Our circuit is based on the neural oscillator proposed by Matsuoka, well known as a building block for constructing a robot locomotion controller. We modified the Matsuokas oscillator to be suitable for analog current-mode implementation, and implemented it as an analog integrated circuit with current-mode low-pass filters. The oscillator circuit operates in the subthreshold region under the low-supply voltages, and thus low power consumption can be expected. We constructed a CPG circuit with four oscillator circuits. Through SPICE simulations, we confirmed that the CPG circuit generates stable phase-locked oscillation corresponding to typical locomotion of patterns of animals, and that the amplitude and frequency of the oscillation can be controlled by tuning bias currents over a wide range.


intelligent sensors sensor networks and information processing conference | 2004

Analog CMOS implementation of a bursting oscillator with depressing synapse

Kazuki Nakada; Tetsuya Asai; Yoshihito Amemiya

The present paper proposes an analog CMOS circuit that implements a bursting oscillator with a depressing synapse. Bursting oscillation arises as the result of interaction between a fast excitatory subsystem and a slow subsystem. We employ an analog circuit, called the hardware oregonator for emulating the Belousov-Zhabotinsky reaction as a fast subsystem and an additional circuit as a slow subsystem. We constructed a bursting oscillator circuit from two bursting cell circuits, based on the hardware oregonator with a depressing synaptic circuit. Using SPICE, we demonstrate that the circuit shows bursting oscillations and the bursting frequency can be regulated by tuning the depressing synapse circuit.


Journal of robotics and mechatronics | 2004

Biologically-Inspired Locomotion Controller for a Quadruped Walking Robot: Analog IC Implementation of a CPG-Based Controller

Kazuki Nakada; Tetsuya Asai; Yoshihito Amemiya

The present paper proposes analog integrated circuit (IC) implementation of a biologically inspired controller in quadruped robot locomotion. Our controller is based on the central pattern generator (CPG), which is known as the biological neural network that generates fundamental rhythmic movements in locomotion of animals. Many CPG-based controllers for robot locomotion have been proposed, but have mostly been implemented in software on digital microprocessors. Such a digital processor operates accurately, but it can only process sequentially. Thus, increasing the degree of freedom of physical parts of a robot deteriorates the performance of a CPG-based controller. We therefore implemented a CPG-based controller in an analog complementary metal-oxide-semiconductor (CMOS) circuit that processes in parallel essentially, making it suitable for real-time locomotion control in a multi-legged robot. Using the simulation program with integrated circuit emphasis (SPICE), we show that our controller generates stable rhythmic patterns for locomotion control in a quadruped walking robot, and change its rhythmic patterns promptly.


international symposium on neural networks | 2009

Coarse image region segmentation using region-and boundary-based coupled MRF models and their PWM VLSI implementation

Yusuke Kawashima; Daisuke Atuti; Kazuki Nakada; Masato Okada; Takashi Morie

This paper proposes a novel region-based coupled Markov Random Field (MRF) model for coarse image region segmentation on silicon platforms. Coupled MRF models are classified into boundary- and region-based models, in which hidden variables are referred to as a line process and a label process, respectively. These hidden variables are crucial for detecting discontinuities in motion, intensity, color, and depth in visual scenes. For a coarse image region segmentation task, we address a region-based coupled MRF model with hidden phase variables. It is shown that the region-based coupled MRF model has an advantage over the resistive-fuse network, which is a boundary-based coupled MRF model, in dealing with the hidden variables explicitly. These models work complementarily for a coarse image region segmentation task. For real-time region segmentation operation, we have designed a merged analog/digital CMOS circuit implementing both functions of the boundary- and region-based coupled MRF models using a pulse modulation approach.


international symposium on circuits and systems | 2011

Analog CMOS circuit implementation of a system of pulse-coupled oscillators for spike-based computation

Kenji Matsuzaka; Kazuki Nakada; Takashi Morie

In this paper, we propose analog CMOS circuit implementation of a system of coupled phase oscillators with pulse coupling for spiking neural networks. We have designed and fabricated a CMOS circuit that achieves the dynamics of pulse-coupled oscillators using TSMC 0.25-µm CMOS technology. In our circuit, oscillator circuits with continuous-time operation interact with each other via a pulse at each firing time. We demonstrate experimentally that the circuit exhibits in- and anti-phase as well as out-of-phase synchronization. Such properties are essential for spike-based computation in neuromorphic systems.


international conference hybrid intelligent systems | 2007

An FPGA-based CollisionWarning System Using Hybrid Approach

Haichao Liang; Takashi Morie; Youhei Suzuki; Kazuki Nakada; Tsutomu Miki; Hatsuo Hayashi

In this paper, we propose an FPGA-based collision warning system for advanced automobile driver assistance systems or autonomous moving robots. The system consists of three function blocks: coarse edge detection using a resistive-fuse network, moving-object detection inspired by neuronal propagation in the hippocampus, and danger evaluation and collision warning using fuzzy inference. The first two functions are implemented in FPGAs. The system can detect moving objects with a speed range of 3-192 km/h with a sampling period of 30 ms for an input image of 320 x 256 pixels, and can output a warning against dangerous regions in the input image.

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Hatsuo Hayashi

Kyushu Institute of Technology

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Takashi Morie

Kyushu Institute of Technology

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Haichao Liang

Kyushu Institute of Technology

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Kenji Matsuzaka

Kyushu Institute of Technology

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Tsutomu Miki

Kyushu Institute of Technology

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Daisuke Atuti

Kyushu Institute of Technology

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Jun Igarashi

Kyushu Institute of Technology

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