Kazutoshi Aida

A mixed-signal 0.18-/spl mu/m CMOS SoC for DVD systems with 432-MSample/s PRML read channel and 16-Mb embedded DRAM

This paper describes a fully integrated single-chip CMOS mixed-signal system on a chip (SoC) for DVD RAM and ROM systems. It integrates a 32-b RISC CPU, formatter, servo digital signal processor (DSP), 16-Mb DRAM, error correction code (ECC), ATA interface, and partial-response-maximum-likelihood (PRML) read channel with 7-b interpolated parallel analog-to-digital converter (ADC). Increasing the bus bandwidth by using embedded DRAM, a hardware ECC engine, and four parallel digital finite-impulse response (FIR) filters contributes to the high playback speed of 16/spl times/. PR(3,4,4,3) architecture has been used in the read channel system for optical disc systems. The obtained wide tangential tilt margin of /spl plusmn/0.6/spl deg/ is due to the use of this PRML read channel technique. The interpolated parallel scheme has attained a high number of effective bits of 6.3 for 72-Mz input frequency at 432-MSample/s operation without any calibration technique, with low power consumption of 180 mW in a small core size of 1.05 mm/sup 2/. This SoC has been fabricated in 0.18-/spl mu/m 1PS3AL CMOS embedded DRAM technology. It contains 24 million transistors in a 144-mm/sup 2/ die and consumes 1.2 W at 432-MSample/s operation. This low power consumption allows the use of a low-cost plastic package. As a result, we can compose highly reliable DVD RAM and ROM systems with this SoC and some tiny components.

A fully-integrated 0.13/spl mu/m CMOS mixed-signal SoC for DVD player applications

A mixed-signal SoC for DVD applications is designed in 0.13/spl mu/m 1P 6M CMOS. One DSP, two 32b RISC CPUs, three dedicated processing units, PRML read channel with an analog front end (AFE) and several other subsystems are integrated on the same die. The AFE contains a 5th-order G/sub m/-C filter and over 66dB C/N. The SoC contains 24M transistors in a 64mm/sup 2/ die and consumes 1.5W at 40MS/s which corresponds to 1.5/spl times/ DVD playback.

A 0.13um CMOS ultra-compact DVD SoC employing a full digital equalizing PRML read channel

A 0.13 /spl mu/m CMOS DVD SoC has been developed, reducing the die size from a previous 64 mm/sup 2/ to 34mm/sup 2/ without degrading its performance and functionality, by optimizing the chip architecture and implementation scheme in the same generation process technology. The presented SoC features a novel PRML read channel, employing full digital equalizers with an oversampling method to improve system stability while keeping channel quality.