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Dive into the research topics where Kee-Chan Park is active.

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Featured researches published by Kee-Chan Park.


Electrochemical and Solid State Letters | 2009

Threshold Voltage Control of Amorphous Gallium Indium Zinc Oxide TFTs by Suppressing Back-Channel Current

Kyoung-seok Son; Tae-Sang Kim; Ji-sim Jung; Myung-kwan Ryu; Kyung-Bae Park; Byung-Wook Yoo; Kee-Chan Park; Jang-Yeon Kwon; Sangyoon Lee; Jong Min Kim

Effects of plasma treatments on the back-channel of amorphous Ga 2 O 3 -In 2 O 3 -ZnO (GIZO) thin film transistors (TFTs) are compared for N 2 and N 2 O plasma. Acceptor-like states originating from the oxygen adsorbed on the back-channel of the GIZO TFTs suppress the back-channel current by capturing the electrons in the GIZO active layer and thus shift the threshold voltage to the positive direction. It is also shown that the oxygen in a silicon oxide passivation layer reduces the back-channel current. An enhancement-mode GIZO TFT has been successfully fabricated by combining the N 2 O plasma treatment and the silicon oxide passivation layer.


international electron devices meeting | 2000

A new poly-Si TFT with selectively doped channel fabricated by novel excimer laser annealing

Jae-Hong Jeon; Min-Cheol Lee; Kee-Chan Park; Sang-Hoon Jung; Min-Koo Han

A new excimer laser annealing method, which results in a single grain boundary in the channel of polycrystalline silicon thin film transistor (poly-Si TFT), is proposed. The proposed method employs lateral grain growth through aluminum patterns on an amorphous silicon layer. The aluminum pattern acts as a selective beam mask and a lateral heat sink during the laser irradiation. Poly-Si TFTs fabricated by the proposed ELA method exhibit considerably improved characteristics, such as the high field effect mobility exceeding 240 cm/sup 2//V sec. The turn-off characteristics have also been improved by the field-reducing structure.


IEEE Electron Device Letters | 2010

Characteristics of Double-Gate Ga–In–Zn–O Thin-Film Transistor

Kyoung-seok Son; Ji-sim Jung; Kwang-Hee Lee; Tae-Sang Kim; Joon-seok Park; Yun-Hyuk Choi; Kee-Chan Park; Jang-Yeon Kwon; Bonwon Koo; Sangyoon Lee

A Ga-In-Zn-O thin-film transistor with double-gate structure is reported. Enhancement-mode operation that is essential to the constitution of a low-power digital circuitry is easily achieved when the upper and lower gate electrodes are tied together. The saturation mobility and the subthreshold swing are improved from 3.65 cm2/(V·s) and 0.44 V/dec to 18.9 cm2/(V·s) and 0.14 V/dec, respectively, compared with the single-gate structure. We can modulate the threshold voltage of either gate by adjusting the bias on the other gate.


IEEE Electron Device Letters | 2010

Highly Stable Double-Gate Ga–In–Zn–O Thin-Film Transistor

Kyoung-seok Son; Ji-sim Jung; Kwang-Hee Lee; Tae-Sang Kim; Joon-seok Park; Kee-Chan Park; Jang-Yeon Kwon; Bonwon Koo; Sangyoon Lee

We report the electrical stability of double-gate (DG) Ga-In-Zn-O thin-film transistors (TFTs). The threshold voltage (<i>VT</i>) shift of the DG TFT after 3 h of positive-bias temperature stress (<i>V</i><sub>GS</sub> = + 20 V, <i>V</i><sub>DS</sub> = + 0.1 V, and Temperature = 60°C) is as small as +2.7 V, while that of a conventional single-gate (SG) TFT is +6.6 V. The results of negative-bias temperature stress [(NBTS); <i>V</i><sub>GS</sub> = - 20 V, <i>V</i><sub>DS</sub> = + 10 V, and Temperature = 60°C] are more dramatic: The <i>VT</i> shift of the DG TFT is only +0.1 V, whereas that of the SG TFT is -9.1 V. With backlight illumination, the <i>VT</i> shift of the SG TFT under the same NBTS becomes severe ( -11.1 V). However, it remains as small as -0.7 V for the DG TFT.


IEEE Electron Device Letters | 2001

A new polycrystalline silicon TFT with a single grain boundary in the channel

Jae-Hong Jeon; Min-Cheol Lee; Kee-Chan Park; Min-Koo Han

A new excimer laser annealing method, which results in large lateral polysilicon grains exceeding 1.5 /spl mu/m, has been proposed and polycrystalline silicon thin film transistors (poly-Si TFTs) with a single grain boundary in the channel have been successfully fabricated. The proposed method employs a lateral grain growth phenomenon obtained by excimer laser irradiation on an amorphous silicon layer with pre-patterned aluminum film. The aluminum patterns act as a masking layer of the incident laser beam for the selective melting of the amorphous silicon layer. Uniform and large grains are obtained near the edge of the aluminum patterns. When two aluminum patterns are separated by a 2 /spl mu/m space, the solidified region (i.e., poly-Si channel) exhibits a single grain boundary. The n-channel poly-Si TPT fabricated by the proposed method shows considerably improved I-V characteristics, such as high field effect mobility exceeding 240 cm/sup 2//Vs.A new excimer laser annealing method, which results in large lateral polysilicon grains exceeding 1.5 /spl mu/m, has been proposed and polycrystalline silicon thin film transistors (poly-Si TFTs) with a single grain boundary in the channel have been successfully fabricated. The proposed method employs a lateral grain growth phenomenon obtained by excimer laser irradiation on an amorphous silicon layer with pre-patterned aluminum film. The aluminum patterns act as a masking layer of the incident laser beam for the selective melting of the amorphous silicon layer. Uniform and large grains are obtained near the edge of the aluminum patterns. When two aluminum patterns are separated by a 2 /spl mu/m space, the solidified region (i.e., poly-Si channel) exhibits a single grain boundary. The n-channel poly-Si TPT fabricated by the proposed method shows considerably improved I-V characteristics, such as high field effect mobility exceeding 240 cm/sup 2//Vs.


Japanese Journal of Applied Physics | 2000

New Excimer Laser Recrystallization of Poly-Si for Effective Grain Growth and Grain Boundary Arrangement

Jae-Hong Jeon; Min-Cheol Lee; Kee-Chan Park; Min-Koo Han

A new excimer laser recrystallization of polycrystalline silicon thin film is proposed to increase the grain size and control the grain boundary locations. The proposed method utilizes the lateral grain growth employing a masking window during excimer laser irradiation. We designed a specific laser-masking window to maximize the lateral growth effect and arrange the location of grain boundaries. As a result of laser irradiation through the opened gap in the masking window, we obtained polycrystalline silicon film with the grain size exceeding 1 µm and also observed well-arranged grain boundaries by transmission electron microscopy. To enhance the overall grain quality of the film, the second laser irradiation without masking window was carried out to recrystallize the residual amorphous silicon regions shaded by the masking patterns during the first laser irradiation. Thin film transistors fabricated by the proposed method showed considerably improved electrical characteristics which directly reflect the quality of polycrystalline silicon active layer.


SID Symposium Digest of Technical Papers | 2008

9.2: Sequential Lateral Solidification (SLS) Process for Large Area AMOLED

Jae Beom Choi; Young-Jin Chang; Cheol-Ho Park; Young-Il Kim; Ji-Hye Eom; Hyung Don Na; In-Do Chung; Seong Hyun Jin; Young-Rok Song; Beom-Rak Choi; Hyo Seok Kim; Kyong-Tae Park; Chi-Woo Kim; Jun-Hyung Souk; Yangsun Kim; Baehyun Jung; Kee-Chan Park

We have demonstrated that the sequential lateral solidification (SLS) technology can be utilized for the large area AMOLED. An optimized SLS process provides us with polycrystalline Si films with well-controlled grain size and location. The thin film transistors (TFTs) with SLS-processed Si films show high performance with desirable uniformity. 14″ WXGA (1280×RGB×768) AMOLEDs were fabricated with SLS-processed TFT backplanes. We utilized RGB evaporation process with fine metal mask. The novel delta pixel arrangement results in increased aperture ratio and wider FMM process window. The advantage of SLS process will be discussed.


IEEE Electron Device Letters | 2012

A Low-Power Scan Driver Circuit for Oxide TFTs

Jae-Eun Pi; Min-Ki Ryu; Chi-Sun Hwang; Shinhyuk Yang; Sang-Hee Ko Park; Sung-Min Yoon; HongKyun Leem; YounKyung Kim; JoonDong Kim; Hwan Sool Oh; Kee-Chan Park

The scan driver composed of oxide thin-film transistors (TFTs) tends to exhibit anomalously high power consumption because the oxide TFT often has negative threshold voltage. In order to resolve this problem, we have invented a new scan driver circuit in which most TFTs are turned off with negative VGS and no TFT with zero VGS is located between the high and low supply voltages. As a result, we could maintain the power consumption within six times of the normal value in spite of the negative threshold voltage of the oxide TFT.


Japanese Journal of Applied Physics | 1999

Excimer-Laser-Induced In-Situ Fluorine Passivation Effects on Polycrystalline Silicon Thin Film Transistors

Cheon-Hong Kim; Jae-Hong Jeon; Juhn-Suk Yoo; Kee-Chan Park; Min-Koo Han

We report a new fluorine passivation method without ion implantation and additional annealing step by low-temperature process and its effects on p-channel polycrystalline silicon (poly-Si) thin film transistors (TFTs). The proposed method is not post-passivation, but in-situ passivation because fluorine passivation is simultaneous with excimer-laser-induced crystallization by employing excimer laser annealing of fluorine-doped silicon oxide (SiOxFy) on amorphous silicon (a-Si) structure. From experimental results, it has been shown that in-situ fluorine passivation is effective to improve the electrical characteristics, specially field-effect mobility, and the stability of p-channel poly-Si TFTs. The improvement is due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in place of the weak Si-H bonds in poly-Si channel and SiO2/poly-Si interface.


Electrochemical and Solid State Letters | 2004

Incomplete Laser Annealing of Ion Doping Damage at Source/Drain Junctions of Poly-Si Thin-Film Transistors

Kee-Chan Park; Woo-Jin Nam; Su-Hyuk Kang; Min-Koo Han

Incomplete annealing of the ion doping damage near the source/drain junctions of the excimer-laser-annealed polycrystalline silicon thin-film transistor has been observed by transmission electron microscopy. The degree ofthe incomplete annealing was increased with increasing gate thickness due to the laser beam diffraction at the gate electrode edge. Simulation of the laser beam diffraction showed that the laser intensity decreased considerably near the junctions and the width of reduced laser intensity region increased with increasing gate thickness. The incompletely annealed ion doping damage decreases the field-effect mobility considerably and increases the leakage current.

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Min-Koo Han

Seoul National University

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Jae-Hong Jeon

Seoul National University

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Min-Cheol Lee

Seoul National University

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Jae-Eun Pi

Electronics and Telecommunications Research Institute

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