Kenneth R. Smith

Evaluation of TSV and micro-bump probing for wide I/O testing

Practical silicon stacking requires pre-tested dies, but contact probing of TSV interconnects requires much higher density, lower probing forces, and lower cost per pin than conventional probe cards have achieved. This paper examines a cost-effective, lithographic-based MEMS probe card technology that is suitable for probing 40µm pitch arrays, and scalable to finer pitches. Initial mechanical and electrical results are presented, demonstrating the feasibility of probing large arrays at 1 gram-force per tip with very low pad damage, so as not to impair downstream bonding or other processing steps.

Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface

In order to obtain acceptable compound stack yields for 2.5D- and 3D-SICs, there is a need to test the constituting dies before stacking. The non-bottom dies of these stacks have their functional access exclusively through large arrays of fine-pitch micro-bumps, which are too dense for conventional probe technology. A common approach to obtain pre-bond test access is to equip these dies with dedicated pre-bond probe pads, which comes with drawbacks such as increased silicon area, test application time, and reduced interconnect performance. In order to avoid the many drawbacks of dedicated pre-bond probe pads, we advocate the usage of advanced probe technology that allows to directly probe on these micro-bumps. This paper reports on the technical and economical feasibility of this approach.

An Application of Membrane Probes for On-Wafer Testing of Unmatched High Power MMICs

A membrane probe capable of determining large signal power handling capabilities of discrete and partially matched large periphery FETs at microwave frequencies has been developed. This paper describes the application and implementation of a membrane probe for a 15.7 mm partially matched 6W power amplifier MMIC that employs off-chip matching networks for a high volume multichip module application.

A fully automatic test system for characterizing large-array fine-pitch micro-bump probe cards

A fully automatic test system for characterizing advanced probe cards able to probe on large-array fine-pitch micro-bumps (such as JEDECs Wide-I/O Mobile DRAM interfaces [1, 2]) has been specified, developed, installed, and brought to a full-operational state. The system is based on a Cascade CM300 probe station from FormFactor and National Instruments PXI test instrumentation and complemented by in-house developed software for automatic test generation and data analysis and visualization. The system is successfully used in conjunction with FormFactors Pyramid Probe® RBI probe-card technology on WIO1 and WIO2 micro-bump arrays on 0300mm wafers designed and manufactured by IMEC. This paper describes the various system components in hardware and software, and experimental results obtained with several test wafers.

Accuracy Considerations in Internal Node Timing Measurements of High-Performance MCMs

In order to take full advantage of MCM technology, it is desirable to push clock rates to the highest rate achievable. It is extremely important to accurately characterize parameters such as timing margins and undershoot conditions to pursue this goal. Probing internal nodes of MCMs is essential to optimizing their performance. This paper investigates the accuracy of signal acquisition under varying probe conditions. The effect of probe parasitic capacitance and inductance on timing measurements is measured and modeled.