Reed Gleason

Evaluation of TSV and micro-bump probing for wide I/O testing

Practical silicon stacking requires pre-tested dies, but contact probing of TSV interconnects requires much higher density, lower probing forces, and lower cost per pin than conventional probe cards have achieved. This paper examines a cost-effective, lithographic-based MEMS probe card technology that is suitable for probing 40µm pitch arrays, and scalable to finer pitches. Initial mechanical and electrical results are presented, demonstrating the feasibility of probing large arrays at 1 gram-force per tip with very low pad damage, so as not to impair downstream bonding or other processing steps.

Accuracy Considerations in Internal Node Timing Measurements of High-Performance MCMs

In order to take full advantage of MCM technology, it is desirable to push clock rates to the highest rate achievable. It is extremely important to accurately characterize parameters such as timing margins and undershoot conditions to pursue this goal. Probing internal nodes of MCMs is essential to optimizing their performance. This paper investigates the accuracy of signal acquisition under varying probe conditions. The effect of probe parasitic capacitance and inductance on timing measurements is measured and modeled.