Kerstin Schneider-Hornstein

Range finding sensor in 90nm CMOS with bridge correlator based background light suppression

Within this work an integrated range finding single pixel sensor manufactured in a standard 90nm CMOS technology is presented. The sensor works on the time-of-flight principle obtaining the distance information out of the correlated sent and received signals. The implementation of a range-finding sensor in 90nm technology is using the most advanced process for a distance sensor up to now based on the bridge circuit. Background light suppression is inherently provided in the pixel sensor. The pixel facilitates a high fill factor accounting to 90% at an area of 50 × 64 µm² and has a power consumption of 2 µW. Measurement results show a standard deviation of 2 cm at 1.2 m covering the range from 0.2 to 3.2 m at 120 klx background illumination.

0.35 μm CMOS avalanche photodiode with high responsivity and responsivity-bandwidth product.

A highly sensitive avalanche photodiode (APD) in 0.35 μm CMOS technology is presented. Due to a thick intrinsic absorption layer, a high responsivity at a low bias voltage, where the avalanche gain is 1, is combined with an excellent avalanche gain at high voltages to achieve a maximum overall responsivity of the APD of more than 10 kA/W. This responsivity exceeds that of other submicrometer CMOS APDs by a factor of more than 700. As a figure of merit the responsivity-bandwidth product is defined, and the achieved value of 23.46 A/W·GHz is 2.4 times higher than the values found in the literature.

High dynamic range background light suppression for a TOF distance measurement sensor in 180nm CMOS

In this paper an integrated background light (BGL) immune single-pixel range finding sensor based on the time-of-flight (TOF) principle is presented. The sensor is fabricated in a standard 180 nm 1P6M CMOS process, reaching 40 × 40 µm2 total pixel area, at a fill factor of ∼ 67%. As a key element for the BGL suppression a current-sample-and-hold circuit is introduced. A resulting distance variation as a function of BGL remained in a 1.5 cm range for applied dc light of 180 klx, which is, to our best knowledge, the highest BGL immunity reported so far. Measurement results are carried out at 100 fps, showing a standard deviation of 8 mm at 1 m and ∼ 4 cm for distances up to 3.2 m.

Optical Wireless APD Receiver With High Background-Light Immunity for Increased Communication Distances

The design and measurement of a monolithically integrated optoelectronic chip consisting of two different receivers are presented. A high-speed receiver for communication including a highly sensitive, large-area avalanche photodiode builds one receiver. A data rate of 1 Gbit/s with a BER <;10-9 is received with a sensitivity of -31.8 dBm. The second receiver consists of two pn-photodiodes connected to a highly sensitive differential transimpedance amplifier with a nonlinear feedback. This circuit is capable of detecting light power differences down to -90 dBm and is implemented two times. Its purpose is the detection of the light spots position on the receiver. The complete chip is fabricated in a standard high-voltage 0.35 μm CMOS technology. The performance in a wireless communication scenario with strong background irradiance is explored, and a comparison with published optoelectronic integrated receivers is given.

TOF range finding sensor in 90nm CMOS capable of suppressing 180 klx ambient light

In this work an integrated Time-Of-Flight (TOF) based range finding single pixel sensor in 90nm CMOS is presented. The sensor exploits a PN photodiode for the signal detection, achieving the pixel size of 80 × 86.5 µm2 at the fill factor of ∼ 93%. Measurement results show a standard deviation of 2.5 cm at 1 m and less than 8 cm for distances up to 3.2 m. Ambient light suppression is accomplished inherently in pixel through the bridge correlator circuit approach, whereby the measured distance changes only in the range +3.2cm to −1.2cm for applied DC light up to 180 klx. An inverter feedback ensures a long integration of the modulated signal canceling out the influence of the photodiode capacitance. Due to very small structure sizes, the circuit itself occupies an area of only 13 × 17 µm2 and together with a shrunken photodiode high count multipixel sensors can be realized.

A DC-to-8.5 GHz 32 : 1 Analog Multiplexer for On-Chip Continuous-Time Probing of Single-Event Transients in a 65-nm CMOS

A multiplexer circuit that is capable of accessing 32 internal nodes for the continuous-time probing of signal waveforms is proposed. A chip has been fabricated with eight multiplexer instances and used in experiments for monitoring radiation-induced single-event transients in digital circuits. Pulses with a width of less than 100 ps and pulses over 1 V in height were observed for 230-MeV particle hits. Measurements show 8.5 GHz, −3-dB bandwidth, and a 1.92% total harmonic distortion for a 1-V input range, and a 6.58% total harmonic distortion for a 2-V input range. The measured dynamic range is nominally 26.5 dB.

10 Gb/s Switchable Binary/PAM-4 Receiver and Ring Modulator Driver for 3-D Optoelectronic Integration

This paper presents ring modulator driver and receiver circuits designed for three-dimensional photonic-electronic integration using interwafer connections, whose parasitic capacitance is expected to be in the order of 15 fF. Both transmitter and receiver can operate with binary and PAM-4 modulation at 10 Gb/s. To the authors knowledge, it is the first PAM-4 ring modulator driver being presented. The circuits are designed in AMS 0.35-μm SiGe BiCMOS technology with total power consumptions of 160 and 180 mW for transmitter and receiver, respectively. The receivers sensitivity is -27 dBm for binary and -22 dBm for 4-PAM signals both at a photodiode responsivity of R = 0.9 A/W. A monitor transimpedance amplifier with sensitivity -32 dBm was also designed in order to control the operating point of the ring modulator.

pn photodiode in 0.35‐μm high-voltage CMOS with 1.2-GHz bandwidth

Abstract. A pn-junction photodiode with a bandwidth in the GHz range is presented. This photodiode is fabricated in a standard 0.35‐μm high-voltage CMOS process with deep n-wells which can isolate negative substrate potentials down to −100  V from the MOS transistors. This photodiode can, therefore, be implemented together with circuits on the same chip. At a reverse bias voltage of −90  V, a bandwidth of 1.2 GHz was measured for 670-nm light. The breakdown voltage of this photodiode is about −180  V.

Experimental Investigation of Single-Event Transient Waveforms Depending on Transistor Spacing and Charge Sharing in 65-nm CMOS

Single-event cross sections of four inverter chains, with uniform inverter spacing ranging from 120 nm to

Dependence of inverter chain single-event cross sections on inverter spacing in 65 nm bulk CMOS technology

4~\mu \text{m}