Reinhard Enne

Dynamic Integrated MPP Tracker in 0.35 μm CMOS

An integrated CMOS controller with fast maximum power point regulation for module-integrated automotive solar converters with nine solar cells per string is reported. It provides the 530-kHz switching signals for the module-integrated converter whereby the mean output current of the module is maximized. The on-chip “perturb and observe” algorithm bases on a quasi-analog principle and performs more than 1000 tracking cycles/s at a power consumption around 560 μW. In order to maximize the precision, the duration of the measurement intervals is automatically adjusted to the output current. Due to the use of a very small shunt resistance of 1 mΩ for the current measurement, the insertion loss is small and the circuit complexity is kept low. Between 0.25- and 5-A photocurrent, the tracker achieves a tracking efficiency better than 99.5%.

OWC Using a Fully Integrated Optical Receiver With Large-Diameter APD

This letter presents a fully monolithically integrated receiver with a large-diameter avalanche photodiode (APD). Using a standard high-voltage 0.35-μm CMOS technology, the APD is implemented with separated absorption and multiplication regions optimizing the ionization ratio between holes and electrons. This optimized ionization ratio leads to a low excess noise factor of the APD, which considerably improves the receivers sensitivity to -31.8 dBm at 1 Gbit/s (bit error rate <;10-9). A 1-Gbit/s wireless optical communication link with a distance of 3.3 m is demonstrated. Due to the highly sensitive receiver, it is possible to omit any kind of input optics, resulting in a wide receiving angle of 68° for a bit error rate of <;10-9.

A maximum power-point tracker without digital signal processing in 0.35μm CMOS for automotive applications

In the upcoming field of e-mobility roof-integrated photovoltaic systems are used to extend the cruising range of electric vehicles. Due to the roofs curvature the solar cells (SC) show different inclination angles to the sunlight, resulting in different maximum power points (MPP) and a lower harvested energy if all SCs are controlled by a centralized MPP-regulated DC/DC converter. A further issue is partial shading. The use of smart modules where a smaller SC number is tied to a module-integrated converter with MPP tracking (MPPT) improves the system efficiency. Current smart module controllers like the SPV1020 [5] use ADCs for voltage and current measurements together with digital processing. Quasi-analog MPPT methods for system-on-chip implementation in this field of application are discussed and tested [1,2] but not realized as ICs. In the field of energy harvesting for micro power applications converters with integrated analogue MPPT are already implemented [3] but the quality of the MPP regulation is too poor for the use in smart modules.

A Monolithic Silicon Quantum Random Number Generator Based on Measurement of Photon Detection Time

In this paper, a nondeterministic random number generator based on detection of the single photons emitted by an Si-CMOS-LED light source integrated for the first time on the detector chip is presented and experimentally demonstrated. We use a ring-shaped single-photon avalanche diode (SPAD) around the Si-CMOS-LED fabricated in 0.35-μm HV-CMOS technology to generate random events. The time intervals between single-photon events are independent quantum random variables. A field-programmable gate array (FPGA) digitizes the time variables to the stream of random bits. Bias in the raw data due to the nonuniform distribution of the time intervals is removed by postprocessing in a special configuration of xor gates to improve the randomness of the generated random bits. The quantum random numbers in 1-Gb streams with bit generation rate of 1 Mb/s were directly delivered to a personal computer (PC) and passed all statistical tests from ENT, STS, and DIEHARD, as well as for more accuracy correlation and bias tests applied on these streams.

Linear Mode Avalanche Photodiode With High Responsivity Integrated in High-Voltage CMOS

A fully integrable avalanche photodiode fabricated in a 0.35-μm standard high-voltage CMOS process is presented. The device achieves a high unamplified responsivity (M = 1) of 0.41 A/W and a maximum responsivity (M = 6.6 · 10⁴) of 2.7 · 10⁴ A/W for 5-nW optical power using a 670-nm laser source. The maximum bandwidth of 850 MHz was measured at 500-nW and 5-μW optical power which results in a responsivity bandwidth product of 17.4-GHz · A/W for a gain of M = 50.

Design and Implementation of an Integrated Reconfigurable Silicon Photonics Switch Matrix in IRIS Project

This paper aims to present the design and the achieved results on a CMOS electronic and photonic integrated device for low cost, low power, transparent, mass-manufacturable optical switching. An unprecedented number of integrated photonic components (more than 1000), each individually electronically controlled, allows for the realization of a transponder aggregator device which interconnects up to eight transponders to a four direction colorless-directionless-contentionless ROADM. Each direction supports 12 200-GHz spaced wavelengths, which can be independently added or dropped from the network. An electronic ASIC, 3-D integrated on top of the photonic chip, controls the switch fabrics to allow a complete and microsecond fast reconfigurability.

Nonlinear Current Control for Power Electronic Converters: IC Design Aspects and Implementation

This letter provides design guidelines and presents a fully integrated implementation of the recently proposed nonlinear average current control (NACC) algorithm for power factor correction and dc–dc converters. The control performance and dynamics of the current-mode controlled power electronic converter strongly depends on the accuracy of the applied current sensing method. Several current sensing methods have been proposed in the literature, including the senseFET method, which is suitable for on-chip current measurement. This letter presents a modification of the senseFET on-chip current sensing technique dedicated for an ultrahigh sensing ratio and suited for the current sensing processing, which gives current-type output what fits well with the NACC control method, thus further simplifying the converter design and reducing cost as well as noise sensitivity of the control circuitry. Hence, the need for a voltage-to-current and current-to-voltage transformation circuit is eliminated. Therefore, the proposed method of the current sensing is applicable to any boost-like converter, whose control system requires an extremely high sensing ratio to be achieved. Nevertheless, it is especially well suited to be combined with an NACC control circuitry irrespective of the required sensing ratio. Experimental results verify the proposed design done in 0.35-μm HV triple-well CMOS technology.

0.35 μm CMOS avalanche photodiode with high responsivity and responsivity-bandwidth product.

A highly sensitive avalanche photodiode (APD) in 0.35 μm CMOS technology is presented. Due to a thick intrinsic absorption layer, a high responsivity at a low bias voltage, where the avalanche gain is 1, is combined with an excellent avalanche gain at high voltages to achieve a maximum overall responsivity of the APD of more than 10 kA/W. This responsivity exceeds that of other submicrometer CMOS APDs by a factor of more than 700. As a figure of merit the responsivity-bandwidth product is defined, and the achieved value of 23.46 A/W·GHz is 2.4 times higher than the values found in the literature.

An integrated low power buck converter with a comparator controlled low-side switch

Here the design of an integrated buck-converter leg is presented in which the free-wheeling diode is replaced by a comparator controlled N-MOSFET. This allows eliminating the efficiency reducing voltage drop at the diode while the discontinuous conducting mode (DCM) is still applicable. For this issue, besides the control block also a fast comparator with a special offset reduction circuit is presented. A layout for a converter bridge was done and simulated which is optimized for the best efficiency at a statistically often used point of operation (3.3V output, 27.5% duty ratio, 1MHz, 170mA).

Optical Wireless APD Receiver With High Background-Light Immunity for Increased Communication Distances

The design and measurement of a monolithically integrated optoelectronic chip consisting of two different receivers are presented. A high-speed receiver for communication including a highly sensitive, large-area avalanche photodiode builds one receiver. A data rate of 1 Gbit/s with a BER <;10-9 is received with a sensitivity of -31.8 dBm. The second receiver consists of two pn-photodiodes connected to a highly sensitive differential transimpedance amplifier with a nonlinear feedback. This circuit is capable of detecting light power differences down to -90 dBm and is implemented two times. Its purpose is the detection of the light spots position on the receiver. The complete chip is fabricated in a standard high-voltage 0.35 μm CMOS technology. The performance in a wireless communication scenario with strong background irradiance is explored, and a comparison with published optoelectronic integrated receivers is given.