Keunhwi Koo

A Variable Step Size for Normalized Subband Adaptive Filters

A normalized subband adaptive filter algorithm uses a fixed step size, which is chosen as a trade-off between the steady-state error and the convergence rate. In this letter, a variable step size for normalized subband adaptive filters is derived by minimizing the mean-square deviation between the optimal weight vector and the estimated weight vector at each instant of time. The variable step size is presented in terms of error variance. Therefore, the proposed algorithm is capable of tracking in non-stationary environments. The simulation results show good tracking ability and low misalignment of the proposed algorithm in system identification.

Steady-state mean-square deviation analysis of improved normalized subband adaptive filter

A new minimization criterion for the normalized subband adaptive filter (NSAF), which is called improved NSAF (INSAF), was introduced recently to improve the performance of the steady-state mean-square deviation (MSD). However, the steady-state MSD analysis of the INSAF was not studied. Therefore, this paper proposes a general solution of steady-sate MSD analysis of the INSAF algorithm, which is based on the substitution of the past weight error vector in the weight error vector. The simulation shows that our theoretical results correspond closely with the computer simulation results in various environments.

Localizing slab identification numbers in factory scene images

This paper deals with algorithms for text localization and character segmentation in images for process automation in the steel-making industry. Each character which comprises slab identification numbers may be corrupted severely before it is captured by network cameras. Therefore, proper processing is required to localize the target texts successfully. In this paper, we propose (1) a method to evaluate the closeness of an edge patch to the form of a closed contour, (2) an edge inspection method to determine character colors and estimate font thickness, and (3) three reasonable binarization methods to increase the performance of the algorithm for the detection of the left and right boundaries of the text rectangle. The experimental results show that the proposed algorithms are reliable.

Fast communication: Variable regularization for normalized subband adaptive filter

To overcome the performance degradation of least mean square (LMS)-type algorithms when input signals are correlated, the normalized subband adaptive filter (NSAF) was developed. In the NSAF, the regularization parameter influences the stability and performance. In addition, there is a trade-off between convergence rate and steady-state mean square deviation (MSD) according to the change of the parameter. Therefore, to achieve both fast convergence rate and low steady-state MSD, the parameter should be varied. In this paper, a variable regularization scheme for the NSAF is derived on the basis of the orthogonality between the weight-error vector and weight vector update, and by using the calculated MSD. The performance of the variable regularization algorithm is evaluated in terms of MSD. Our simulation results exhibit fast convergence and low steady-state MSD when using the proposed algorithm.

Modified Two-Dimensional Soft Output Viterbi Algorithm with Two-Dimensional Partial Response Target for Holographic Data Storage

The previously modified two-dimensional (2D) soft output Viterbi algorithm (SOVA) for holographic data storage (HDS) consists of four one-dimensional (1D) SOVAs in accordance with two different 1D partial response (PR) targets (vertical and horizontal directions). In this study, we propose a detection method in structural accordance with a 2D PR target through the use of the modified 2D SOVA. The proposed method shows superior bit error rate performance owing to the use of a 2D PR target that contains more information than the 1D PR target. Moreover, a reduction in power consumption, computational complexity, and the system-on-chip size for HDS system can be expected as a result of the use of only one 2D equalizer.

Real-time adjustment of power management policy for a time-based power control architecture

As state-of-the-art mobile devices are demanded for high performance and attractive designs, system-on-chips have been integrated with many functional blocks into a single chip to reduce the chip size, cost, and power consumption. In this paper, to reduce power consumption of heterogeneous processor, a power management algorithm is proposed with a time-based power control architecture which autonomously performs voltage/clock scaling operations without the intervention of the processors. The proposed algorithm has adaptively adjusted time-threshold levels for voltage/clock control to minimize the power consumption and work in severe time-constraints for real-time processing. The real-time adjustment makes robust performance of the power consumption guarantee regardless of patterns of data traffic and diverse application programs. To show performance of the proposed, they are adopted to an application processor integrated with a communication processor for smartphones. Via electronic system-level simulation, it is shown that the proposed algorithm reduces the power consumption by approximately 40%.

Two-Dimensional Soft Output Viterbi Algorithm with a Variable Reliability Factor for Holographic Data Storage

In a practical holographic data storage system, the reconstruction process for a data page should account for the processing time as well as the bit error rate (BER) performance. To improve both aspects, we introduce two-dimensional (2D) partial response maximum likelihood composed of a 2D partial response (PR) target including diagonal elements and a 2D soft output Viterbi algorithm (SOVA) with a variable reliability factor. The 2D SOVA performs two one-dimensional (1D) SOVAs in structural accordance with the 2D PR target where extrinsic information uses the expected value calculated on a synchronization pattern. Finally, the 2D SOVA exports a weighted average using the reliability factor that is updated similarly as the optimization scheme for each page. The simulation results show that the proposed method has superior BER performance, despite using only two 1D SOVAs as compared with the modified 2D SOVA composed of four 1D SOVAs.

High-performance low-power application processor integrated with modem processor

An architecture is proposed to design a single chip with an application processor (AP) and a modem processor (MP). As an aggressive challenge, the MPs dedicated memory is removed to share the main memory with the AP. In addition, an autonomous power management (APM) is presented to reduce the power consumption of time-constrained tasks such as wireless communication. The APM is designed without the intervention of the microprocessors, to deal with the random and sparse data pattern of voice communication. For the architectural exploration, an electronic system-level simulation is performed for verifying the performance and power consumption. Through the simulation results, the proposed architecture exhibits small size, good performance and energy consumption.

System Identification Using Embedded Dynamic Signal Analyzer

The effect of model uncertainty is increased in optical disc drives (ODDs) because the mechanical and electrical components are manufactured with a wide error tolerance to reduce production costs. In this paper, we introduce a new technique for system identification whereby an embedded dynamic signal analyzer (EDSA) is used for the estimation of the system frequency characteristics. The estimated transfer function can be utilized to adapt a controller and improve the performance and stability of the system in terms of the model uncertainty. The EDSA comprises a sine generator, system identifier, and band-pass filter. A design methodology is proposed for the production of an accurate and cost-effective sine signal, which minimizes error and prevents overflow. Moreover, the proposed algorithms are implemented in a system-on-chip for an ODD. The experimental results show that the EDSA exhibits good performance and reliability.

Design for layer jump in optical disc drives using internal state manipulation

Layer jump operation is a vertical seek operation of an actuator between adjacent data layers in an optical disc. As a number of the data layers are raised for high capacity data, the layer jump gradually gains importance for fast playing and recording. Therefore, a systematic design methodology for the layer jump is required to guarantee layer pull-in stability and robustness of model uncertainty. In this paper, a layer jump strategy is proposed for minimizing transient motion and overcoming the effect of model uncertainty by estimating the current velocity of the actuator. The proposed algorithm has been implemented in a system-on-chip for a multi-layered Bluray disc drive. The experimental results show the notable performance of the proposed algorithm.