Kevin Bolding

The case for chaotic adaptive routing

Chaotic routers are randomizing, nonminimal adaptive packet routers designed for use in the communication networks of parallel computers. Chaotic routers combine the flexibility found in adaptive routing with a design simple enough to be competitive with the most streamlined oblivious routers. We review chaotic routing and compare it with other contemporary network routing approaches, including state-of-the-art oblivious and adaptive routers. A detailed head-to-head comparison between oblivious, minimal adaptive, and chaotic routing is then presented, exploring the performance of comparable VLSI implementations through analysis and simulation. The results indicate that chaotic routers provide very effective and efficient high-performance message routing.

Distributed expertise for teaching computer organization & architecture

This report presents preliminary results from our project on creating distributed expertise for teaching computer organization & architecture course(s) in the undergraduate computer science curriculum. We present the details of an online survey designed to gather information from faculty on the current state of teaching this course. The survey also tries to identify specific areas of need for creating distributed expertise as reported by various faculty. We also present several resources that have been identified that are available for use by faculty teaching the course(s). This report represents a mid-point of an ongoing two-year study. Following a discussion of the currently identified needs, we discuss ways to address them and conclude the report with a plan of action that will follow in the next phase of the project.

An Emulator for Exploring RaPiD Configurable Computing Architectures

The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest demand for computation and power in embedded and mobile computing applications, and these demands are increasing faster than Moores law. This paper describes the RaPiD Emulator, a system that will allow the exploration of alternative configurable architectures in the context of benchmark applications running in real-time. The RaPiD emulator provides enough FPGA gates to implement large RaPiD arrays, along with a high-performance streaming memory architecture and high-bandwidth data interfaces to a host processor and external devices. Running at 50 MHz, the emulator is able to achieve over 1 GMACs/second.

Design of a Router for Fault-Tolerant Networks

As interconnection networks grow larger and larger, the need for reliable message delivery in the presence of faults grows as well. Unfortunately, most network routing schemes currently in use do not provide graceful tolerance of even the most common faults. Because routing messages around failed components requires non-minimal routing, it makes sense to examine routers which, by design, allow packets to take non-minimal routes. Such routers provide a basic level of fault-tolerance by allowing messages to be routed around faults, without requiring a priori knowledge of their locations. However, the mechanisms can be slow and clumsy at times. We augment Chaotic routing, a non-minimal adaptive routing scheme, with a limited amount of hardware to support fault detection, identification, and reconfiguration so that the network can automatically reconfigure itself when faults occur. We present a high-level design of these mechanisms, driven by the goal of achieving reasonable reliability without exorbitant cost.

CRANIUM: An Interface for Message Passing on Adaptive Packet Routing Networks

Cranium is a processor-network interface for an interconnection network based on adaptive packet routing. Adaptive networks relax the restriction that packet order is preserved; packets may be delivered to their destinations in an arbitrary sequence. Cranium uses two mechanisms: an automatic-receive interface for packet serialization and high performance, and a processor-initiated interface for flexibility. To minimize software overhead, Cranium is directly accessible by user-level programs. Protection for user-level message passing is implemented by mapping user-level handles into physical node identifiers and buffer addresses.

Overview of fault handling for the chaos router

The chaos router is an adaptive nonminimal message router for multicomputers that is simple enough to compete with the fast, oblivious routers now in use in commercial machines. It improves on previous adaptive routers by using randomization, which eliminates the need for complex livelock protection and speeds the router. This randomization, however, greatly complicates the fault detection because there is no worstcase bound on the time required to deliver a message. Distinguishing between lost and very slow messages is difficult. A new method of fault detection is presented that applies not only to the chaos router but also to other adaptive routers as well. In addition, solutions to several practical fault diagnosis and recovery problems in the chaos router are presented. The presentation supports the claim that fault tolerance can be incorporated into a practical router without harming performance for the normal, fault-free cases.<<ETX>>

ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing

In recent years, the Chaos Project at the University of Washington has analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the chaotic routing algorithm (a.k.a. Chaos) has been the most successful. Although the Chaos router was developed for multicomputer routing, the project has recently directed its attention towards the application of Chaos technology to LAN switching. The present task is to implement a gigabit LAN called ChaosLAN, based on a centralized switch (hub) and high speed se- rial links to workstations. The switch itself is a fully-populated two-dimensional torus network of Chaos routers. The host adapter is Digital’s PCI Pamette card. To evaluate the performance of ChaosLAN, we are supporting the Global Mem- ory System (GMS), a type of distributed virtual memory also developed at UW. We also describe an application involving real-time haptic rendering used in a sur- gical simulator.

Network Fault Detection and Recovery in the Chaos Router

Chaotic routing, which allows packets to follow non-minimal routes, provides a basic level of fault-tolerance by allowing messages to be routed around faults without requiring a priori knowledge of their locations. However, the mechanisms for doing this can be slow and clumsy at times. We augment Chaotic routing with a limited amount of hardware to support fault, detection, identification, and reconfiguration so that the network can automatically reconfigure itself when faults occur. We present a high-level design of these mechanisms, driven by the goal of achieving reasonable reliability without exorbitant cost.

Developing a sense of purpose in graduating engineers

While some graduating engineers have a highly-developed sense of purpose and direction for their careers and lives, many students are merely aware that they possess valuable technical skills and enjoy working on engineering projects. At Seattle Pacific University, our mission includes not only training technically competent engineers, but also preparing them with a sense of purpose developed from our Christian worldview. To this end, we have added a significant component to our senior design courses that engages students in discussions and reflective writing about their purpose in becoming an engineer. Drawing on the concept of vocation, we examine and discuss ways that an engineer can find significance in his or her career that goes beyond simply having a good job that pays well. We hope that after completing this course, engineering students are better prepared to find a particular career that fits their life goals, graduates will have a better sense of purpose in their work, and practicing engineers are more motivated to make transformational changes in their workplace. This work-in-progress presents our curriculum components and provides an early look at the student outcomes.

A hybrid distance-learning/face-to-face class experiment

Many colleges and universities have begun to offer distance-learning classes by using the World Wide Web. Although distance learning offers many advantages, it does not provide the face-to-face experience of a traditional classroom experience. In this paper we explore the results of teaching a hybrid WWW and face-to-face class. A computer organization class that is typically taught two evenings per week will be restructured to meet one evening per week (or perhaps every other week) during spring quarter 1999, thus reducing the number of evenings the students and instructors must commit to class meetings. The reduction in class meetings is accomplished by providing the class lectures via the WWW. Class lectures will be presented using off-the-shelf presentation software with voice accompaniment, allowing the students to view/listen to the lectures at times of their own choosing. Moreover, they may review the lectures at will to enhance their understanding. During classroom sessions, students can ask the instructor questions and participate in group discussions. The class sessions will also provide a time for demonstrations and examinations. A unique aspect of this experiment is made possible by offering a concurrent section of the same course using traditional teaching techniques with the same instructor. By comparing the outcomes of the two courses, conclusions on the relative effectiveness of the hybrid class may be drawn.