Kevin Buck

A Scalable High-Voltage Output Driver for Low-Voltage CMOS Technologies

A monolithic implementation of series connected MOSFETs for high-voltage switching applications is presented. Using a single low-voltage control signal to trigger the bottom MOSFET in the series stack, a voltage division across parasitic and inserted capacitances in the circuit is used to turn on the entire stack of devices. This voltage division both statically and dynamically safeguards the individual MOSFETs over the entire switching period. Because the output voltage is balanced across each device in the stack for the entire switching period, stress to the oxide and hot-carrier degradation are minimized, even in the event of transient over voltages. This circuit, termed the Stacked MOSFET, is ntimes scalable, allowing for the on-die control of voltages that are ntimes the fabrication processes rated operating voltage. The governing equations for this circuit are derived and reliable operation is demonstrated through simulation and experimental implementation in a 0.35-mum SOI CMOS process. The realized prototype is shown to handle 2times the nominal process operating voltage at a switching frequency of 20 MHz with an input-to-output delay of only 5.5 ns

The modeling and simulation of a permanent magnet synchronous motor with direct torque control based on Matlab/Simulink

This paper introduces the modeling of the direct torque control (DTC) system of permanent magnet synchronous motor based on Matlab/Simulink. The process of the building simulation system is discussed in detail. Simulation results are presented to help understand the system performance and the influence of PI controller parameters on it. The relationship between torque hysteresis loops width and torque ripple amplitude is analyzed and the result shows that the torque ripple can be reduced by narrowing the torque hysteresis loops width. The simulation also demonstrates the PI controller parameters Kp and Ki should be properly matched to achieve high system performance. The simulation results and user-friendly graphic user interface proved that Matlab /Simulink is an effective tool to simulate and analyse a motor drive system

Flyback converter with voltage control mode on chip for portable applications

This paper introduces a compact, low power and submicron integrated DC-DC flyback converter designed for generating a constant desired output voltage. The proposed topology is designed to operate in continuous current mode operation at 1.25MHz. A PWM control scheme based on triangular waveform modulation is presented. The converter switch and voltage mode control system is fabricated in a standard 0.35mum CMOS technology. Energy storage and power isolation are off-chip. Synchronous rectification topology using MOSFET is implemented. The converter with voltage control mode is observed to generate a DC voltage of 3.3V with 0.08 ripple using CADENCE simulations

Method to improve total dose radiation hardness in a CMOS dc-dc boost converter

MOSFETs used in space are subject to exposure to natural radiation in space. Among the effects of ionizing radiation are shifts in threshold voltage and reduction of carrier mobility. In this paper, total-dose effects in switching dc/dc boost converter are examined using SPlCE simulations. Then a new circuit design for an open loop dc/dc boost converter that is much less sensitive to radiation is proposed. By adding four more MOSFETs to the conventional design, good radiation hard behavior is observed under SPICE simulation. The improved design converter can work properly in a wide range of radiation environment, with increasing total dose radiation. The efficiency also greatly improves, and so does the leakage performance.

A low voltage to high voltage level shifter in a low voltage, 0.25/spl mu/m PD SOI process

This paper describes a low voltage to high voltage logic level shifter that has been designed entirely in a low breakdown voltage process. As such, the scalability of the design to higher output levels has not been restricted by the fabrication process used. Further, to increase the output voltage capability of the design, without altering the fabrication process in any way, the University of Idaho developed high voltage, laterally diffused MOSFET (LDMOSFET) is used for the output driver. By combining a unique circuit topology with LDMOSFETs, output voltage levels are achieved that exceed the breakdown voltage of the process used. A 2.5-5 volt implementation of the design is presented, along with a generalization for higher levels. All circuits have been developed in a 2.5 volt breakdown, 0.25/spl mu/, partially depleted, silicon-on-insulator, radiation hardened CMOS process.

Analysis and Testing of the Boost Converter Constructed with SOI LDMOSFET Switches: Effects of Various Inductor Types on Performance

An examination of the boost converter is presented in this paper beginning with discussion of fundamental components such as the LDMOSFET and the inductor. Following this is an expounding upon of various circuit schematics of the boost converter along with their corresponding analytical equations. An ideal, a semi-ideal, and a more sophisticated converter model incorporating more parasitic elements were utilized to this end, with the two more elaborate of the three standards chosen for simulation work. Experimental test results are then compared with simulation values employing different types of inductors thus allowing conclusions to be drawn

MOSFET charger controller circuit for on chip power cells in aeronautical applications

Integrated microbatteries are being currently developed to act as a “micropower” source in microsatellites. They help provide localized current capacities or embedded power supplies at the chip level, for space exploration. These power cells are designed to be rechargeable. This research paper aims at presenting charging these power cells using pulsing algorithms developed at MRCI with an on chip pulse charger controller.

Shared multiplier design of a digital filter on a high-temperature FPGA module

This paper outlines the design of a space-efficient digital filter for use in high-temperature FPGA applications. It presents an implementation of a Butterworth filter design using VHDL: shared multiplier. It outlines the main signals and states used in the design. The shared multiplier design uses a single multiplier for each multiplication in the equation. The design is the smallest of the three. The results obtained by implementing the design on a FPGA are also presented. The shared multiplier approach is efficient in terms of demand of space on the FPGA

Design of a High-Temperature, Space Efficient Digital Filter on an FPGA

This paper outlines the design of a space-efficient digital filter for use in high-temperature FPGA applications. It presents three different methods of implementing a Butterworth filter design using VHDL: bit serial, shared multiplier and single step. It outlines the main signals and states used in these designs. The bit-serial approach uses bit-serial arithmetic for the filter equation instead of combinational adders and multipliers. This filter design is the slowest in processing the data, and is not very efficient in terms of flip-flops or overall space usage. The shared multiplier design uses a single multiplier for each multiplication in the equation. The design is the smallest of the three. The single step design calculates the filter equation in one step using multiple adders and multipliers. This design uses the least number of flip-flops. The results obtained by implementing these designs on a FPGA are also presented. The shared multiplier and the single step approach are both efficient depending on the resource in demand on the FPGA. The bit serial approach is not useful for space efficient designs

Essentials of SOI technology for small power supply applications

The relationship between that of silicon-on-insulator (SOI) technology and ordinary CMOS is presented followed with an examination of the basic features of MOSFETs fabricated under the SOI process. Such features include the intrinsic junction diodes, diffusion capacitance, floating-body effect, internal parasitic bipolar effects, the insulation layer and its consequences, and the self-heating effect. In addition to the fact that many of these features provide improvements in transistor design and performance over standard CMOS, SOI technology is poised to become competitive for small power supply applications.