Kevin Lyne
Texas Instruments
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custom integrated circuits conference | 2005
Kevin Lyne
There has recently been much discussion regarding the pros and cons of Silicon on Chip (SOC) versus System in Package (SW). SOC is firstly driven by cost reduction and secondly by miniaturization. This involves cost reduction at component level as well at system (handset) level. Cost reduction comes from a reduction of total component count, both ICs and passives, as well as reduction in mother board area. Further cost avoidance comes from a bill of materials with few components, giving the benefits of lower surface mounting costs, and lower inventory overhead. Similarly, SW can offer some of these benefits. However, in most cases, the primary motivation for SW is miniaturization, rather than cost reduction. An aggressive goal for a SIP product would be to achieve the same cost for the SIP as the sum of the elements integrated in to the SW. Even if this aggressive cost goal is not achieved, the benefits from the miniaturization are frequently sufficient to justify the development of a SIP product. In reality, there is no conflict between the SOC and SIP technologies. Many times both techniques are employed synergistically. This paper continues this SOC vs SIP discussion, focusing on SIP, and demonstrating the synergism between the two
Archive | 2001
Kevin Lyne
Archive | 2007
Kevin Lyne
Archive | 1999
Kevin Lyne
Archive | 2007
Kevin Lyne
Archive | 2008
Kenneth Robert Rhyner; Kevin Lyne; David G. Wontor; Peter R. Harper
Archive | 2012
Kevin Lyne; Kurt P. Wachtler
Archive | 2007
Peter R. Harper; James L. Turner; Kevin Lyne; Kurt P. Wachtler
Archive | 2010
Kevin Lyne; Stanley Craig Beddingfield; Elida I. De Obaldia; Raymundo Monasterio Camenforte; David Charles Stepniak
Archive | 2006
Kevin Lyne