Kurt P. Wachtler
Texas Instruments
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Featured researches published by Kurt P. Wachtler.
IEEE Transactions on Device and Materials Reliability | 2012
Xi Liu; Qiao Chen; Venkatesh Sundaram; Margaret Simmons-Matthews; Kurt P. Wachtler; Rao Tummala; Suresh K. Sitaraman
A thermo-mechanical reliability study of through-silicon vias (TSVs) is presented in this paper. TSVs are used to interconnect stacked dies to achieve 3-D packages. As the core of the TSV contains high coefficient of thermal expansion (CTE) copper surrounded by low-CTE SiO2 and Si materials, the thermo-mechanical reliability of TSVs is a concern. When dies with such TSVs are stacked and packaged, the presence of additional structures and associated materials could introduce different thermo-mechanical concerns compared with free-standing wafers. This paper presents 3-D finite-element models for studying the thermo-mechanical stresses in TSVs in free-standing wafers and in stacked dies, which are packaged. Warpage measurements have been used to validate the finite-element modeling approach. The results from the finite-element models show that the TSV stresses in a packaging configuration are typically lower than the TSV stresses in a free-standing wafer configuration. In addition, it is seen that the microbumps connecting adjacent dies experience high magnitude of inelastic strain, indicating that such locations are of reliability concern.
electronic components and technology conference | 2011
Xi Liu; Qiao Chen; Venkatesh Sundaram; Margaret Simmons-Matthews; Kurt P. Wachtler; Rao Tummala; Suresh K. Sitaraman
Through-silicon via (TSV), being one of the key enabling technologies for 3D system integration, is being used to interconnect 3D vertically stacked devices, such as logic, memory, sensors, and actuators that are fabricated on separate wafers and then interconnected by either wafer-to-wafer or chip-to-wafer methods. However, thermo-mechanical analyses on TSVs are limited, and most of the existing studies focus on the thermo-mechanical analysis of TSVs in a freestanding wafer, rather than in an integrated package. In this paper, three-dimensional thermo-mechanical finite-element models have been built to analyze the stress/strain distribution in a 3D integrated package which contains stacked dice with TSVs, inter-chip microbumps, overmold, and underfilled solder bumps, and an organic substrate. Models show that the stresses in the TSV under packaging configuration could be generally lower than the stresses in the TSV in a free-standing wafer. Also, the models show that the high-strain region switches from TSV corners to microbumps.
First International Conference on Integration and Commercialization of Micro and Nanosystems, Parts A and B | 2007
David B. Wallace; Donald J. Hayes; Ting Chen; Virang G. Shah; Delia Radulescu; Patrick W. Cooley; Kurt P. Wachtler; Arunkumar Nallani
In the last decade, ink-jet has come to be viewed as a precision microdispensing tool, in addition to its huge success in color printing. Today, this tool is being used in a wide range of applications, including electrical & optical interconnects, sensors, medical diagnostics, drug delivery, MEMS packaging, and nanostructure materials deposition. Ink-jet microdispensing is data-driven, non-contact, and is capable of precise deposition of picoliter volumes at high rates, even onto non-planar surfaces. Being data-driven, ink-jet dispensing is highly flexible and can be readily automated into manufacturing lines. This paper will illustrate a few of the applications of ink-jet technology that are either MEMS manufacturing applications, or relevant to potential MEMS manufacturing applications.© 2007 ASME
Volume 11: Nano and Micro Materials, Devices and Systems; Microsystems Integration | 2011
Xi Liu; Margaret Simmons-Matthews; Kurt P. Wachtler; Suresh K. Sitaraman
Through-silicon via (TSV), being one of the key enabling technologies for three dimensional (3D) Integrated Circuit (IC) stacking, silicon interposer technology, and advanced wafer level packaging (WLP), has attracted tremendous interest throughout the semiconductor industry. However, limited work addresses TSV reliability issue, and most of the existing reliability studies focus on the thermo-mechanical performance of TSVs in a free-standing wafer, rather than in an integrated package. In this paper, three-dimensional thermomechanical Finite-Element (FE) models with TSVs in both free-standing wafers and 3D integrated packages have been built and analyzed. In addition, Design of Experiments (DOE) based approach has been used to understand the effect of various parameters. Results show that the selection of underfill materials between stacked dies is the most dominating design factor for TSV/microbump reliability.Copyright
Archive | 2000
Peter J. Maimone; Kurt P. Wachtler; Tsen-Hwang Lin; Mark W. Heaton
Archive | 2001
Kurt P. Wachtler; David N. Walter; Larry J. Mowatt
Archive | 2006
Mark A. Gerber; Kurt P. Wachtler; Abram Castro
Archive | 2011
Kurt P. Wachtler
Archive | 2008
Yves Leduc; Nathalie Messina; Charvaka Duwury; Kurt P. Wachtler
Archive | 2008
Yves Leduc; Nathalie Messina; Charvaka Duvvury; Kurt P. Wachtler