Khaled A. El-Ayat

An architecture for electrically configurable gate arrays

An architecture for electrically configurable gate arrays using a two-terminal antifuse element is described. The architecture is extensible, and can provide a level of integration comparable to mask-programmable gate arrays. This is accomplished by using a conventional gate array organization with rows of logic modules separated by wiring channels. Each channel contains segmented wiring tracks. The overhead needed to program the antifuses is minimized by an addressing scheme that utilizes the wiring segments, pass transistors between adjacent segments, shared control lines, and serial addressing circuitry at the periphery of the array. This circuitry can also be used to test the device prior to programming and observe internal nodes after programming. By providing sufficient wiring tracks segmented into carefully chosen lengths and a logic module with a high degree of symmetry, fully automated placement and routing is facilitated. >

A CMOS electrically configurable gate array

A CMOS electrically configurable gate array that combines the flexibility, efficiency, extendability, and performance of mask-programmed gate arrays with the convenience of user programmability is described. The implementation is facilitated by a novel two-terminal antifuse programmable element and a configurable interconnect technology. The chip has been fabricated using 2- mu m n-well CMOS technology with two-layer metallization. >

A high performance, high density sea of modules FPGA architecture

Functionality and flexibility has been significantly enhanced with this novel sea of modules FPGA architecture. It includes a new improved logic cell, high performance interconnect architecture and full featured fracturable flip flops. The architecture is designed for high in system performance as well as low cost user programmable implementations. A flexible high performance I/O architecture complements the architecture with high performance input/output delays. A modular architecture and design methodology allows quick proliferation to multiple families while tailoring the individual family characteristics to quickly serve a particular market segment. The family uses a novel metal to metal antifuse technology that affords high performance, scalability and cost reduction.