Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Klaus Schottmann is active.

Publication


Featured researches published by Klaus Schottmann.


international symposium on power semiconductor devices and ic's | 2008

Time Dependent Isolation Capability of High Voltage Deep Trench Isolation

Ralf Lerner; Uwe Eckoldt; Klaus Schottmann; Steffen Heinz; Klaus Erler; Andre Lange; Gunter Ebest

The long term isolation properties of deep trenches in thick SOI have been investigated by current-voltage- characteristics. A strong change of the measured trench leakage current was observed depending on the applied voltage. Further on a marked decrease of the leakage current was observed depending on the duration and polarity of the applied stress. The improvement of the formatted trench isolation was found to be irreversible with time, temperature and voltage polarity. This so-called formation effect can be described by a theoretical simulation model assuming a tunneling process of electrons through the oxide barrier, taking into account the charging and discharging of traps within the trench sidewall oxides. The observed formation effect leads to improved reliability results, wherein the trench is either damaged at the start of the stressing or no dielectric breakdown occurs at all.


international symposium on industrial electronics | 2010

Optimization of trench manufacturing for a new high-voltage semiconductor technology

Matthias Fritzsch; M. Schramm; Klaus Erler; Steffen Heinz; John T. Horstmann; Uwe Eckoldt; Gabriel Kittler; Ralf Lerner; Klaus Schottmann

Deep trenches for device insulation in a high-voltage process in thick SOI were fabricated using different manufacturing technologies. The trenches have been investigated by current-voltage-characteristics. In comparison to the conventional produced trenches alternatively fabricated samples reach a remarkable increase of the breakdown voltages accompanied by a decline of the leakage current in the order of several magnitudes. Respecting other process parameters a trench fabrication method has been selected which enables the manufacturing of reliable single trenches suitable for operating voltages up to 650 V. The new trench can be implied within a prospective X-FAB process. A reduction of area consumption is possible in many designs by replacing double trenches by single trenches. The future high-voltage X-FAB process will include new primitive devices which are currently designed and characterized. In this work new diode types with characteristic properties are presented.


international symposium on industrial electronics | 2007

Modeling the Leakage Current of Dielectric Isolation Structures in a High-Voltage Semiconductor Technology

Andre Lange; Steffen Heinz; Klaus Erler; Gunter Ebest; Ralf Lerner; Uwe Eckoldt; Klaus Schottmann

System-in-package integration becomes more and more important in the growing market of micromechanical sensors and actuators. The most important group of actuators are those based on the electrostatic working principle. Because of the high voltages used to drive these actuators, new methods of isolation need to be introduced. In this paper we will characterize and model the electrical behavior of such an isolation technology. A simple device model to regard parasitic effects of this isolation during the process of circuit design will be introduced.


2011 Semiconductor Conference Dresden | 2011

Device engineering for a modular 650 V transistor assortment

Ralf Lerner; Klaus Schottmann; Gabriel Kittler

Using a trench isolated 650 V quasi-vertical n-channel DMOS as a starting point several new 650 V transistor types have been evaluated. Mainly by design measures a 650 V depletion DMOS, a 650 V PMOS and a 650 V IGBT were created for a modular integration into the process flow. Design modifications like increased channel length, well constructions and drain modifications were used to create the new devices. Original n-channel DMOS design features like curvatures or field plate constructions have been re-used. Necessary new process steps for the depletion transistor and for the IGBT were kept to minimum additional process effort and use a flexible process approach with independent addable modules.


international soi conference | 2010

Single trench isolation for a 650 V SOI technology with low mechanical stress

Gabriel Kittler; Ralf Lerner; Uwe Eckoldt; Klaus Schottmann; Matthias Fritzsch; M. Schramm; Klaus Erler; Steffen Heinz; John T. Horstmann

The successful optimization and characterization of a deep trench isolation in a thick SOI process for operating voltages up to 650 V is reported. Different technologies were investigated to optimize the mechanical stress during wafer processing and to increase the breakdown voltage of a single trench configuration. Comprehensive electrical characterization was done to investigate achievable operating conditions and related reliability issues for thick oxide trench isolation layers. The most promising trench technology was choosen as a modular extension to an existing 650 V SOI BCD process.


international semiconductor conference | 2013

Trench isolated thick SOI process for various optical and high voltage devices

Ralf Lerner; Daniel Gaebler; Klaus Schottmann; Siegfried Hering

By using a trench isolated thick SOI process as base topology various optical and high voltage devices can be designed which are not or hardly possible in pn-junction isolated BCD processes. The trench isolation allows the construction of isolated photodiodes with excellent response even for red and infrared wavelengths. The thick SOI material enables the integration of vertical high voltage devices like NPN bipolar transistors. Together with a special collector design the buried layer and the sinker allow the integration of an IGBT device which is tune able between on-state and switching performance.


Archive | 2010

DMOS Transistor Having an Increased Breakdown Voltage and Method for Production

Ralf Lerner; Phil Hower; Gabriel Kittler; Klaus Schottmann


Archive | 2003

Mutually insulated MOSFETs with extended drain region for higher voltages, forming components of integrated circuits in silicon on insulator (SOi) technology, with each transmitter active semiconductor layer surrounded completely

Ralf Lerner; Gunter Stoll; Klaus Schottmann


Facta universitatis. Series electronics and energetics | 2015

COMPARISON OF DIFFERENT DEVICE CONCEPTS TO INCREASE THE OPERATING VOLTAGE OF A TRENCH ISOLATED SOI TECHNOLOGY TO ABOVE 900V

Ralf Lerner; Klaus Schottmann; Siegfried Hering; Andreas Käberlein; Matthias Fritzsch; Klaus Schneider; Daniel Beyer; Steffen Heinz


Archive | 2013

DMOS-Transistor mit erhöhter Durchbruchsspannung und Verfahren zur Herstellung.

Ralf Lerner; Hower, Phil, Tex.; Gabriel Kittler; Klaus Schottmann

Collaboration


Dive into the Klaus Schottmann's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Steffen Heinz

Chemnitz University of Technology

View shared research outputs
Top Co-Authors

Avatar

Klaus Erler

Chemnitz University of Technology

View shared research outputs
Top Co-Authors

Avatar

Matthias Fritzsch

Chemnitz University of Technology

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Andre Lange

Chemnitz University of Technology

View shared research outputs
Top Co-Authors

Avatar

Gunter Ebest

Chemnitz University of Technology

View shared research outputs
Top Co-Authors

Avatar

John T. Horstmann

Chemnitz University of Technology

View shared research outputs
Researchain Logo
Decentralizing Knowledge