Koji Shirai

Ultra-low on-resistance LDMOS implementation in 0.13µm CD and BiCD process technologies for analog power IC's

Toshibas 5th generation BiCD/CD-0.13 is a new process platform for analog power applications based on 0.13µm CMOS technology. The process platform has six varieties of rated voltage, 5V, 6V, 18V, 25V, 40V, and 60V. 5 to 18V CD-0.13 process use P-type silicon substrate. 25 to 60V BiCD-0.13 process use N-Epi wafer with N+/P+ buried layer on P type silicon substrate. Each LDMOS recode ultra-low on-resistance compared with that of previous papers, and we will realize the highest performance analog power ICs using this technology.

P‐47: Quiet Code: A Transition‐Minimized Code to Eliminate Inter‐Word Transition for an LCD‐Panel Module Interface

Quiet code not only minimizes intra-word transition but also eliminates inter-word transition for EMI reduction in LCD panel module interface. Combined with modulo reduction, it also avoids the extra bit of DPCM prediction error without any information loss, and it is estimated to gain 7-dB EMI suppression with 1-V predictor.