Krishna Rangasayee

Enhanced embedded logic analyzer

Memory cells configurable as CAM or RAM in programmable logic devices

Configuration eprom with programmable logic

Fully programmable I/O pin with memory

Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards

Programmable logic device with selectable schmitt-triggered and threshold-triggered buffers

Integrated circuit incorporating a programmable cross-bar switch

Embedded logic analyzer

Programmable logic device incorporating function blocks operable as wide-shallow RAM

Programmable logic device architecture incorporating a dedicated cross-bar switch