Kristian Granhaug

Six subthreshold full adder cells characterized in 90 nm CMOS technology

This paper presents a performance analysis and evaluation of six different 1-bit full adder topologies in deep subthreshold operation. The cells are characterized with respect to delay, power consumption, driving capability, power-delay product (PDP), energy-delay product (EDP) and maximum operating frequency. Both traditional CMOS, a specialized low power cell and minority-3 based full adders are simulated and characterized. PDPs of less than 200 aJ are reported, for FA cells operating at frequencies around 2 MHz, for Vdd=200 mV, dissipating less than 100 nW of average power

Improving Yield and Defect Tolerance in Multifunction Subthreshold CMOS Gates

This paper presents simulations of 3 different implementations of the minority-3 function, with special focus on mismatch analysis through statistical Monte Carlo simulations. The simulations clearly favors the minority-3 mirrored gate, and a gate-level redundancy scheme, where identical circuits with the same input drive the same output-node, is further explored as a means of increasing fault- and defect-tolerance. Important tradeoffs between supply voltage, redundancy and yield are revealed, and VDD = 175 mV is suggested as a minimum useful operating voltage, combined with a redundancy factor of 2

Body-bias regulator for ultra low power multifunction CMOS gates

This paper presents a novel technique for biasing multifunction CMOS gates operating in the subthreshold region, to achieve better matching between nMOS and pMOS subthreshold currents. Two different implementations of the minority-3 gate have been simulated in a general purpose 90 nm triple-well process. The proposed regulator circuit increases the degree of symmetry between rise and fall times for both gates, compared to the unregulated case where the wells were tied to a fixed voltage. Simulations also show improved stability across a large temperature range for both circuits when use of the regulator is employed. Through Monte-Carlo simulations for typical process parameters it is also shown that low-level redundancy significantly increases yield for both minority-3 gates

CMOS nanoscale impulse radar utilized in 2-dimensional ISAR imaging system

This paper presents a complete impulse based radar transceiver integrated on a single chip. The high bandwidth of the transmitted pulses offers unique penetration abilities and very high accuracy. By taking advantage of the Continuous Time Binary Valued (CTBV) design paradigm, some of the main show stoppers of systems based on traditional digital design techniques have been removed. This paper explores the advantages and possibilities of the fully integrated CTBV radar, and introduces basic background on the Inverse Synthetic Aperture Radar (ISAR) along with experimental results. Measurements have been performed that confirm the theory and show that the proposed nanoscale impulse radar system may be utilized for 2D-imaging combining low cost implementation with high quality. The CMOS radar consumes 113mW from a 1.2V/2.5V power supply.

Remote monitoring of vital signs using a CMOS UWB radar transceiver

This paper presents a fully CMOS integrated Impulse Radio Ultra Wide Band (IR-UWB) based radar transceiver applied in remote respiration- and heart-rate monitoring. The combination of high bandwidth and direct RF sampling offers fine spatial resolution and accuracy along with flexibility in the application-level signal processing. The high-speed RF sampling is enabled by a time-interleaved Analog-to-Digital Converter relying on the inherent coherency of radar TX/RX. The topology is based on Continuous Time Binary Valued (CTBV) signal processing moving design constraints from the amplitude domain to the time domain adapting to the very short time-constants offered by modern CMOS technology. The primary focus of this paper is to explore the use of UWB radar technology in health and medical applications, where the offered combination of high resolution and penetration abilities is a major advantage. In addition to covering the actual radar sensor, embedded signal processing based on Pulse-Doppler time-frequency analysis is utilized in a fully self-contained radar module. Measured results of vital signs in different scenarios are presented and discussed.

A study of low-power crystal oscillator design

UWB backscatter RFID systems require high quality clock signals and crystal oscillator is one of the few candidates. A study of a low-power parallel-mode crystal oscillator for such applications is presented. A 7.8125 MHz Pierce crystal oscillator is realized in a TSMC 90 nm CMOS process. It has a frequency stability of ±7 ppm from 0 to 70°C and draws 36 μW from a 1.2 V supply. The core area excluding pads is 0.021 mm2.

7.7 A 118mW 23.3GS/s dual-band 7.3GHz and 8.7GHz impulse-based direct RF sampling radar SoC in 55nm CMOS

Radar sensors find use in a wide range of applications [1–4]. Impulse radars operating below 10GHz offer opportunities in applications including non-contact vital signs monitoring, such as breathing and heart rate, presence detection, and ranging. However, the wide instantaneous bandwidth incurs a power penalty from the ADC, calling for unconventional receiver (RX) architectures [4, 5]. In practical use, the received power from narrowband interferers, such as 802.11, can be much larger than the echo from the targets, requiring an unnecessarily large RX dynamic range. In this paper we report an impulse radar SoC (shown in Fig. 7.7.1), featuring a transmitter (TX) that complies with regulations for unlicensed operation, 1b direct RF sampling, and RF interference rejection. The system is self-contained, including power management and clock generation functions, and requires only an external crystal and antennas to operate.