Kyoung-nam Kim

Semiconductor memory device and method for driving the same

Semiconductor memory device having delay locked loop

BLEQ driving circuit in semiconductor memory device

Address latch circuit of memory device

Pipe latch device of semiconductor memory device

Delay locked loop in semiconductor memory device and method for generating divided clock therein

Circuit for initializing a pipe latch unit in a semiconductor memory device

Semiconductor memory device capable of controlling tAC timing and method for operating the same

Semiconductor memory device having a global data bus

Delay locked loop circuit for preventing malfunction caused by change of power supply voltage