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Featured researches published by Lai L. Wai.


IEEE Microwave and Wireless Components Letters | 2006

Double-Stacked EBG Structure for Wideband Suppression of Simultaneous Switching Noise in LTCC-Based SiP Applications

Jongbae Park; Albert Chee W. Lu; Kai M. Chua; Lai L. Wai; Jun-Ho Lee; Joungho Kim

We propose a novel electromagnetic bandgap (EBG) structure with a significantly extended noise isolation bandwidth, called a double-stacked EBG (DS-EBG) structure, fabricated on a low-temperature co-fired ceramic (LTCC) multilayer substrate. The DS-EBG structure was devised for wideband suppression of simultaneous switching noise (SSN) coupling in system-in-package (SiP) applications. Our design approach was enabled by combining two EBG layers embedded between the power and ground planes. The two EBG layers had different bandgaps from using different cell sizes. Enhanced wideband suppression of the SSN coupling was validated using a 11.4-GHz noise stop bandwidth with 30-dB isolation in time and frequency domain measurements up to 20GHz


electronic components and technology conference | 2008

3D strip meander delay line structure for multilayer LTCC-based SiP applications

Gawon Kim; Albert Chee W. Lu; Fan Wei; Lai L. Wai; Joungho Kim

Recently, the timing control of high-frequency signals is strongly demanded due to the high integration density in three-dimensional (3D) LTCC-based SiP applications. Therefore, to control the skew or timing delay, new 3D delay lines will be proposed. For frailty of the signal via, we adopt the concept of coaxial line and proposed an advanced signal via structure with quasi coaxial ground (QCOX-GND) vias. We will show the simulated results using EM and circuit simulator.


international symposium on electromagnetic compatibility | 2004

Efficiency of differential signaling on cavity noise suppression in applications with reference plane change

Junho Lee; Jaemin Kim; Joungho Kirn; Albert Chee W. Lu; Wei Fan; Lai L. Wai

We present the effect of reference plane change of signal traces on cavity noise generation and signal quality deterioration. Also, the efficiency of differential signaling in reducing the power plane noise and the alleviation of signal integrity deterioration, which are caused by power/ground plane resonance, are investigated with the analytical cavity noise coupling model and measurement.


electronic components and technology conference | 2002

Modeling and characterization of wire bonding for RF applications

Albert Chee W. Lu; W. Fan; Lai L. Wai; Lee A. Low; Fei X. Ke; Kok C. Yip; Yak P. Lim

This paper describes a design methodology for improving the electrical performance of wire bonding. Adjacent power or ground wires are used to provide return paths in a coplanar configuration, thereby minimizing impedance mismatch. Design space exploration based on full-wave electromagnetic analysis is performed to achieve an optimized topology. The methodology has been demonstrated for both parallel and fanout bonding topologies for high frequencies up to 10 GHz. With advances in wire bonding technology, particularly fine pitch bonding, a coplanar configuration is highly feasible. The proposed methodology can be applied to lead frame, leadless chip carrier, COB and advanced BGA packages.


electronics packaging technology conference | 2007

Ultra Compact LTCC Based AiP for 60 GHz Applications

Lai L. Wai; Kai M. Chua; Albert C. W. Lu; Yue Ping Zhang; M. Sun

In this paper we propose to integrate two antennas in an IC package that carries the 60-GHz radio chip sets. The antennas realized in this manner are simply called as AiP (antenna-in-package). AiP are radically different as compared with the integrated and chip antenna solutions. The AiP solution offers the possibility to combine antennas with a highly integrated 60-GHz radio into a compact standard surface mounted device. As a result, the system-level board space and the system-level manufacturing can be further reduced and facilitated, respectively.


electronic components and technology conference | 2004

Analysis of coupling suppression methods on split power/ground planes using embedded capacitor in multi-layered package

Youchul Jeong; Albert Chee W. Lu; Lai L. Wai; Wei Fan; Boon Keng Lok; Joungho Kim

Various noise suppression methods using embedded capacitors are analyzed and verified by frequency domain measurement and full wave simulation up to 10 GHz frequency range. In this paper, especially, the noise coupling suppression methods on split power/ground plane in the multi-layered packages are analyzed.


ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference | 2005

Power Distribution Analysis of Multi-Layer Substrates With Power Decoupling Capacitors

Albert Chee W. Lu; Lin Jin; Kai M. Chua; Wei Fan; Lai L. Wai

This paper describes power distribution design and analysis for multi-layer LTCC (low temperature co-fired ceramic) substrates intended for broadband digital applications. Both land side discrete capacitor (LSC, i.e. mounted on the bottom) and top side discrete capacitor (TSC, i.e. mounted on the top or the same side as the active device) configurations were compared in terms of impedance characteristics up to 3 GHz, with respect to different port locations for the active device. Full-wave electromagnetic modeling was carried out to study the impedance characteristics and good correlation with vector network analyzer measurements was achieved. At lower frequencies well below the self-resonant frequency of the intrinsic power plane, the effective impedance is dominated by the series effective inductance. It was observed that the LSC configuration achieves lower impedance due to a reduced series effective inductance since the TSC configuration results in a longer low frequency impedance path. At higher frequencies, however, the LSC configuration actually results in an impedance peak at a lower frequency due to the parallel resonance attributed to the power planes.Copyright


electronic components and technology conference | 2004

Broadband via transition analysis and characterization

Albert Chee W. Lu; Lai L. Wai; Wei Fan; Lin Jin

This paper presents a new methodology to analyze the key aspects of via transition. Proliferation of mixed-signal functionality in modem applications is strongly driving the level of physical integration where the performance of vias is becoming highly critical. Previous proposed methodologies do not accurately model the return current path and hence, the power plane cavity resonance is not included. As a result, crosstalk characteristics are not well modelled. A new methodology is proposed to accurately account for interaction between cavity resonance and via transition. Test vehicles comprising of multi-layer ceramic and FR-4 substrates were fabricated. Test vehicle characterizations were carried out to demonstrate the impact of power plane resonance characteristics on signal via transition. Measurements in both frequency and time domain indicate that the proposed approach does not suffer from inaccuracies in broadband performance prediction, particularly in terms of return current path and cavity resonance interaction. In addition, it was shown that the use of ground vias will not only enhance impedance matching but also significantly suppress noise due to power plane resonance.


electronic components and technology conference | 2003

Design optimization of wire bonding for advanced packaging

Albert Chee W. Lu; W. Fan; Lai L. Wai; C.K. Wang; H.G. Low

This paper describes a coplanar topology for improving the high-frequency performance of wire hondmg. Adjacent power or ground wires are used to provide retnm paths in a coplanar configuration, thereby minimizing impedance mismatch. Full-wave electromagnetic simulations were performed to extract the bond pitch dependent characteristics. The proposed topology was also demonstrated in a leadless plastic package (QFN). A test vehicle was also fabricated and characterized up to 13 GHz and good correlation with electromagnetic simulations was also achieved.


2003 International Electronic Packaging Technical Conference and Exhibition, Volume 2 | 2003

Design Optimization of Power Distribution Design Networks Using Embedded Passive Technology

Albert Chee W. Lu; Wei Fan; Lai L. Wai; Toshiro Yamazaki; Jacinto Jun Jarcia; Kim H. Chin

This paper describes a design optimization of power distribution networks using embedded passive technology. A frequency-domain methodology was used to study the impedance characteristics of printed circuit board power planes with embedded decoupling capacitors, and also the interaction with discrete capacitors, package structures and on-chip capacitors. Two different thin-core materials were analyzed. Key aspects of power distribution networks including plane spreading inductance, plane pair via inductance and transfer impedance were also analyzed. Utilizing broadband PDN models, extracted with full-wave EM techniques to account for frequency-dependent behaviour, frequency-domain SPICE simulations were carried out to determine the system impedance characteristics at multiple port locations up to 2 GHz. The frequency-domain analysis shows that in bare boards, significant SSN interaction between different port locations within the printed circuit board is present. It is concluded that the proper use of high-K distributed capacitors at optimal locations on the printed circuit board helps to alleviate SSN interaction between different port locations. Several multi-layer test vehicles have been fabricated and characterized, with good correlation between simulation results and measured values.Copyright

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Lee A. Low

DSO National Laboratories

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M. Sun

Nanyang Technological University

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