Leslie Charles Jenkins

Functional testing of TFT/LCD arrays

Introduction Of all the flat-panel technologies, only the TFT/LCD is expected to pose a serious challenge to the cathode ray tube [1]. TFT/LCD prototypes have already demonstrated full color capability, a requirement of high-informationcontent displays. TFT/LCDs also have an inherent immunity to high ambient light levels while operating at low levels of power consumption, a characteristic not shared by electroluminescent or plasma displays. Many companies have recognized the advantages of the TFT/LCD, and the total investment in this technology is now approaching two billion dollars [2]. TFT/LCD technology shares many similarities with silicon integrated circuit technology, such as djoiamic random access memories (DRAMs). Both involve film deposition, although TFT/LCD technologies employ lowertemperature processing. In both, photolithography and etching are used to pattern each level. Both structures employ random addressing capability. Many characterization and yield management techniques are also applicable to both. The operating mode of a TFT/LCD is not digital, however, but analog, because the light output varies as a smooth function of the voltage stored [3]. Therefore, functional testing of TFT/LCDs is much different, as will be seen. There is growing interest in testing and repair techniques for these displays [4-8]. We have developed a Dynamic Array Tester that characterizes TFT arrays. The Dynamic Array Tester can detect, locate, and grade both line faults and pixel faults in a TFT array. It can be used as an in-line manufacturing screen to sort product into pass, fail, or repair categories, and this sorting can be done immediately after the arrays have been fabricated and again after the display has been filled with liquid crystal. It can also be used to verify array designs and perform failure analysis.

A 10.5-in.-diagonal SXGA active-matrix display

A 157-dot-per-inch, 262K-color, 10.5-in.- diagonal, 1280 × 1024 (SXGA) display has been fabricated using a six-mask process with Cu or Al-alloy thin-film gates. The combination of high resolution and gray-scale accuracy has been shown to render color images and text with paperlike legibility. The low-resistivity gate metallization and trilayer-type TFTs with a channel length of 6-8 µm were fabricated with a six-mask process which is extendible to larger, higher-resolution displays. A combination of double-sided driving and active line repair was used so that open gate lines or data lines did not result in visible line defects. A flexible drive-electronics system was developed to address the display and characterize its performance under different drive conditions.

A six-mask TFT-LCD process using copper-gate metallurgy

— A novel reduced mask process is used to fabricate high-resolution high-aperture-ratio 10.5-in. SXGA (1280 × 1024) displays. The process uses copper gate-metallurgy with redundancy, without the need for extra processing steps. The resulting displays have 150-dpi color resolution, an aperture ratio of over 35%, and excellent image quality, making them the first high-resolution displays that are suitable for notebook applications.

Characterization of TFT/LCD arrays

Thin-film-transistor (TFT) array characterization is important to liquid-crystal display (LCD) design, development, failure analysis, and sorting on a manufacturing line. The authors present characterization highlights obtained using a TFT array tester that can detect, accurately locate, and in many cases identify both line faults and pixel faults in a TFT array. It can provide useful performance information on normally operating pixels.<<ETX>>