Liang-Hung Lu

A Wide Tuning-Range CMOS VCO With a Differential Tunable Active Inductor

By utilizing a differential tunable active inductor for the LC-tank, a wide tuning-range CMOS voltage-controlled oscillator (VCO) is presented. In the proposed circuit topology, the coarse frequency tuning is achieved by the tunable active inductor, while the fine tuning is controlled by the varactor. Using a 0.18-mum CMOS process, a prototype VCO is implemented for demonstration. The fabricated circuit provides an output frequency from 500 MHz to 3.0 GHz, resulting in a tuning range of 143% at radio frequencies. The measured phase noise is from -101 to -118 dBc/Hz at a 1-MHz offset within the entire frequency range. Due to the absence of the spiral inductors, the fully integrated VCO occupies an active area of 150times300 mum2

Design of Ultra-Low-Voltage RF Frontends With Complementary Current-Reused Architectures

In this paper, ultra-low-voltage circuit techniques are presented for CMOS RF frontends. By employing a complementary current-reused architecture, the RF building blocks including a low-noise amplifier (LNA) and a single-balanced down-conversion mixer can operate at a reduced supply voltage with microwatt power consumption while maintaining reasonable circuit performance at multigigahertz frequencies. Based on the MOSFET model in moderate and weak inversion, theoretical analysis and design considerations of the proposed circuit techniques are described in detail. Using a standard 0.18-mum CMOS process, prototype frontend circuits are implemented at the 5-GHz frequency band for demonstration. From the measurement results, the fully integrated LNA exhibits a gain of 9.2 dB and a noise figure of 4.5 dB at 5 GHz, while the mixer has a conversion gain of 3.2 dB and an IIP3 of -8 dBm. Operated at a supply voltage of 0.6 V, the power consumptions of the LNA and the mixer are 900 and 792 muW, respectively.

A High-Performance CMOS Voltage-Controlled Oscillator for Ultra-Low-Voltage Operations

In this paper, a novel circuit topology of voltage-controlled oscillators (VCOs) suitable for ultra-low-voltage operations is presented. By utilizing the capacitive feedback and the forward-body-bias (FBB) technique, the proposed VCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output swing. Using a standard 0.18-mum CMOS process, a 5.6-GHz VCO is designed and fabricated for demonstration. Consuming a dc power of 3 mW from a 0.6-V supply voltage, the VCO exhibits a frequency tuning range of 8.1% and a phase noise of -118 dBc/Hz at 1-MHz offset frequency. With an FBB for the cross-coupled transistors, the fabricated circuit can operate at a supply voltage as low as 0.4 V. The measured tuning range and phase noise are 6.4% and -114 dBc/Hz, respectively

A compact 2.4/5.2-GHz CMOS dual-band low-noise amplifier

This letter presents a fully integrated 2.4/5.2-GHz dual-band low-noise amplifier (LNA) for WLAN applications. By switching the input transconductance and the output capacitance, the narrow-band gain and impedance matching are achieved at the 2.4-GHz and the 5.2-GHz frequency bands. Using a standard 0.18-/spl mu/m CMOS process, a compact dual-band LNA with a chip size comparable to a single-band one is realized in the proposed topology for a minimum hardware cost. The fabricated circuit exhibits gains of 10.1dB and 10.9dB, and noise figures of 2.9dB and 3.7dB at the two frequency bands, respectively.

50 mV-Input Batteryless Boost Converter for Thermal Energy Harvesting

A fully electrical startup boost converter for thermal energy harvesting is presented in this paper. The converter is implemented in a 65-nm bulk CMOS technology. With the proposed 3-stage stepping-up architecture, the minimum input voltage for startup is as low as 50 mV while the input voltage required for sustained power conversion is 30 mV. Due to the use of a zero-current-switching (ZCS) converter as the last stage and an automatic shutdown mechanism for the auxiliary converter, conversion efficiency up to 73% is achieved. By incorporating the boost converter and a thermoelectric generator (TEG), a miniaturized module is demonstrated for energy harvesting applications.

60-GHz Four-Element Phased-Array Transmit/Receive System-in-Package Using Phase Compensation Techniques in 65-nm Flip-Chip CMOS Process

AThe 60-GHz four-element phased-array transmit/receive (TX/RX) system-in-package antenna modules with phase-compensated techniques in 65-nm CMOS technology are presented. The design is based on the all-RF architecture with 4-bit RF switched LC phase shifters, phase compensated variable gain amplifier (VGA), 4:1 Wilkinson power combining/dividing network, variable-gain low-noise amplifier, power amplifier, 6-bit unary digital-to-analog converter, bias circuit, electrostatic discharge protection, and digital control interface (DCI). The 2 × 2 TX/RX phased arrays have been packaged with four antennas in low-temperature co-fired ceramic modules through flip-chip bonding and underfill process, and phased-array beam steering have been demonstrated. The entire beam-steering functions are digitally controllable, and individual registers are integrated at each front-end to enable beam steering through the DCI. The four-element TX array results in an output of 5 dBm per channel. The four-element RX array results in an average gain of 25 dB per channel. The four-element array consumes 400 mW in TX and 180 mW in RX and occupies an area of 3.74 mm2 in the TX integrated circuit (IC) and 4.18 mm2 in the RX IC. The beam-steering measurement results show acceptable agreement of the synthesized and measured array pattern.

A 10-Gb/s Inductorless CMOS Limiting Amplifier With Third-Order Interleaving Active Feedback

This paper presents an inductorless circuit technique for CMOS limiting amplifiers. By employing the third-order interleaving active feedback, the bandwidth of the proposed circuit can be effectively enhanced while maintaining a suppressed gain peaking within the frequency band. Using a standard 0.18-mum CMOS process, the limiting amplifier is implemented for 10-Gb/s broadband applications. Consuming a DC power of 189 mW from a 1.8-V supply voltage, the fabricated circuit exhibits a voltage gain of 42 dB and a -3-dB bandwidth of 9 GHz. With a 231-1 pseudo-random bit sequence at 10 Gb/s, the measured output swing and input sensitivity for a bit-error rate of 10-12 are 300 and 10 mVpp, respectively. Due to the absence of the spiral inductors, the chip size of the limiting amplifier including the pads is 0.68times0.8 mm2 where the active circuit area only occupies 0.32times0.6 mm2

Analysis and Design of Wideband Injection-Locked Ring Oscillators With Multiple-Input Injection

In this paper, the locking range of the injection-locked ring oscillators is investigated. To improve the injection efficiency and the locking range for superharmonic frequency division, a multiple-injection technique is proposed. Using a 0.18-mum CMOS process, a wideband frequency divider based on a three-stage ring oscillator is implemented for demonstration. With a tunable free-running frequency, the fabricated circuit provides 2:1 and 4:1 frequency division with a single-ended input signal ranging from 13 to 25 and 30 to 45 GHz, respectively. Compared with the case of the single-ended injection, the locking range of the frequency divider almost doubles when multiple-input injection with optimum phases is utilized. The experimental results exhibit good agreement with the theoretical derivation and the circuit simulation.

40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS

A 40GHz wide-locking-range frequency divider and a low-phase-noise VCO are implemented in 0.18mum CMOS technology. The frequency divider demonstrates a locking range of 10.6GHz with 0dBm input power while the VCO exhibits a phase noise of -108.65dBc/Hz at 1MHz offset. Each of the 2 circuits consumes 6mW from a 1V supply.

Design of Wide-Tuning-Range Millimeter-Wave CMOS VCO With a Standing-Wave Architecture

The design of a wide-tuning-range millimeter-wave CMOS VCO is presented in this paper. In contrast to the conventional wideband topologies, a nonuniform standing-wave oscillator utilizing tapered gain elements, switched transmission lines and distributed varactors is employed to provide an extended output range with the coarse and fine frequency tuning. Due to the use of the transmission line architecture and the position-dependent amplitude of the standing waves, the loading effects of the varactors and the MOS switches can be alleviated, enabling the VCO to operate at higher frequencies. Using a 0.18-mum CMOS process, a 40-GHz VCO is designed and implemented. Consuming a DC power of 27 mW from a 1.5-V supply voltage, the fabricated circuit exhibits a frequency tuning range of 7.5 GHz with an output power level ranging from -13.6 to -4 dBm. The measured phase noise at 1-MHz offset is lower than -96 dBc/Hz within the entire frequency range. This work demonstrates the widest tuning range in percentage among the CMOS VCOs at millimeter-wave frequencies.