ng-Guang Li

LDMOS transistors on Si-on-SiC hybrid substrates having crystalline or poly-crystalline SiC - electrical and thermal characterization

First ever demonstration of LDMOS transistors on Sion-SiC hybrid substrates. No degradation in transistor performance as compared to conventional SOI. Poly-SiC is available in larger wafer sizes but seems to have slightly lower heat conductivity than crystalline SiC. The intermediate a-Si layer provides electrical advantages and does not form any thermal barriers.

Electrical and thermal characterization of 150 mm Silicon-on-polycrystalline-Silicon Carbide hybrid substrates

150 mm Silicon-on-polycrystalline-Silicon Carbide (poly-SiC) hybrid substrates, without intermediate oxide layers have been realized by hydrophilic wafer bonding of SOI- and poly-SiC wafers. A novel rapid thermal treatment step has been introduced before furnace annealing to avoid bubble formation, cracks and breakage. The final substrates are shown to be stress-free. Electrical and thermal characterization of devices manufactured on the substrate using a MOS process show excellent performance.

Thermal characterization of Silicon-on-SiC substrates

Thermal characterization of the new Si-on-SiC hybrid substrate has shown thermal properties superior in comparison with SOI. The thermal resistivity was shown to be a factor of four lower, and the lateral thermal spread was much more efficient, as is explained by the excellent heat conductivity of the SiC substrate. These results correspond well to the absence of MOSFET self-heating effects for the BaSiC. Transmission electron microscopy reveals a defect free bond and recrystallization of the amorphous silicon, which improves the heat conductivity.

Mobility profiles and thermal characterization of SOI and Si-on-SiC hybrid substrates

This paper presents new results revealing the electrical properties of the silicon-on-polycrystalline silicon carbide hybrid substrate. The thermal resistance in the substrate was measured and compared to simulations and is linked to the measured reduced self-heating in LDMOS transistors. The mobility in the device layer was extracted and shows slightly lower values in the hybrid compared to the SOI. Furthermore, the gate oxide integrity was evaluated suggesting that the poly-Si layer in the Si/SiC hybrid may act as a gettering layer for impurities due to the lower QBD spread.

Oxide-Free Silicon to Silicon Carbide Heterobond

Thin crystalline device layersof Si were bonded to Si-faced SiC wafers, with eithera chemical or a thermal oxide interface layer. The interfacethermal oxide was successfully removed by oxygen out-d ...