Linh Dang

Demonstration of a 311-GHz Fundamental Oscillator Using InP HBT Technology

In this paper, a sub-millimeter-wave HBT oscillator is reported. The oscillator uses a single-emitter 0.3 m15 m InP HBT device with maximum frequency of oscillation greater than 500 GHz. The passive components of the oscillator are realized in a two metal process with benzocyclobutene used as the primary transmission line dielectric. The oscillator is implemented in a common base topology due to its inherent instability. The design includes an on-chip resonator, output matching circuitry, and injection locking port. A free-running frequency of 311.6 GHz has been measured by down-converting the signal. Additionally, injection locking has been successfully demonstrated with up to 17.8 dB of injection-locking gain. This is the first fundamental HBT oscillator operating above 300 GHz.

Fabrication of InP HEMT devices with extremely high Fmax

In this paper, we present the latest advancements of short gate length InGaAs/InAlAs/InP high electron mobility transistor (InP HEMT) devices that have achieved extremely high extrapolated Fmax above 1 THz. The high Fmax is validated through the first demonstrations of sub-MMW MMICs (s-MMICs) based on these devices including the highest fundamental transistor oscillator MMIC at 347 GHz and the highest gain greater than 15 dB (greater than 5 dB per stage) at 340 GHz.

Demonstration of 184 and 255-GHz Amplifiers Using InP HBT Technology

In this letter, 184 and 255 GHz single-stage heterojunction bipolar transistor (HBT) amplifiers are reported. Each amplifier uses a single-emitter 0.4 ¿m 15 ¿m InP HBT device with maximum frequency of oscillation (fmax) greater than 500 GHz and of 200 GHz. The 183 GHz single-stage amplifier has demonstrated gain of 4.3 ± 0.4 dB for all sites on the wafer. The 255 GHz amplifier has measured gain of 3.5d B and demonstrates the highest frequency measured HBT amplifier gain reported to date. Both amplifiers show excellent agreement with original simulation.

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Static frequency dividers are widely used technology performance benchmark circuits. Using a 0.25 μm 530 GHz fT /600 GHz+ fmax InP DHBT process, a static frequency divider circuit has been designed, fabricated, and measured to operate up to 200.6 GHz. The divide-by-two core flip-flop dissipates 228 mW. Techniques used for the divider design optimization and for selecting variants to maximize performance across process changes are also discussed.

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A new InP HEMT process has been developed with 35nm gate length and improved Ohmic contact. A gate-source capacitance of 0.4pF/mm is achieved with the reduced gate length, a 30% improvement over our baseline 70nm device. The contact resistance is successfully reduced to 0.07 with the newly designed contact layer combined with an alloyed Au/Ge/Ni/Au Ohmic metal. Good device characteristics has been demonstrated with a transconductance as high as 2 S/mm and a cutoff frequency fr of 420GHz. A single-stage common-source amplifier was fabricated with this new process. A peak gain of 5dB is measured at 265GHz. A MAG/MSG of 3dB at 300GHz was achieved, making the device suitable for applications at frequencies well into the millimeter-wave and even sub-millimeter-wave band.

m InP DHBT 200 GHz+ Static Frequency Divider

We have recently developed a sub-50nm gate length InP HEMT (high electron mobility transistor) process with a peak transconductance of 2000 mS/mm at 1V. A 3-stage single-ended common source 150-220 GHz MMIC LNA demonstrates greater than 20 dB gain at 200 GHz (> 7 dB gain per stage) and is >5 dB higher LNA gain compared to the same MMIC design fabricated on our baselined 70 nm gate length InP HEMT MMIC process. To our knowledge, this is the highest amplifier gain per stage achieved at this frequency range.

35nm InP HEMT for Millimeter and Sub-Millimeter Wave Applications

We report an advanced InP/InGaAs double heterojunction bipolar transistor technology using aggressive scaling in device layout and epitaxial stack. The device employs a 220Å highly doped base and a 1200Å collector designed to support current densities in excess of 12 mA/µm2. Transistors with emitter width of 0.25-µm have exhibited simultaneous measured ƒT and ƒmax frequencies in the 500 GHz range. Frequency divide-by-two digital circuits designed and fabricated with this InP bipolar technology have demonstrated maximum clock frequency of 172 GHz. Manufacturing capabilities for mixed-signal circuits of increased complexity are also reported with improvements in resolution and bandwidth.

High Gain G-Band MMIC Amplifiers Based on Sub-50 nm Gate Length InP HEMT

We report InP-based double heterojunction bipolar transistors (DHBTs) with emitter widths of 0.25 mum and RF performance of fT = 400 GHz and fmax >500 GHz. The HBT structure consists of an InP emitter with an abrupt emitter-base interface, a 300 compositionally graded InGaAs base region, and a 1200Aring collector. The scaled devices reported here have been integrated with a planar, multi-level interconnect process to produce static divide-by-2 circuits with maximum input frequencies greater than 150 GHz and small DDS circuits with output fclock up to 21 GHz. We believe that the device and interconnect technology reported here represents a combination of performance and integration suitable for future digital and mixed-signal applications while maintaining the manufacturability required for large circuit yield

172 GHz divide-by-two circuit using a 0.25-µm InP HBT technology

An InGaAs/InAlAs/InP HEMT with sub-50nm EBL gate has been developed for sub-millimeter wave (SMMW) power amplifier (PA) applications. In this paper, we report the device performance including high drain current, high gain, high breakdown voltage and scalability to large gate periphery, which are essential for achieving high output power at these frequencies. Excellent yield, process uniformity and repeatability are also demonstrated, which is critical for power amplifiers employing large number of devices and gate fingers. 10mW output power is demonstrated from a fixtured 338 GHz PA module.

Sub-Micrometer InP/InGaAs Heterojunction Bipolar Transistors with fT = 400 GHz and fmax > 500 GHz

Maximizing In composition in the channel structures of high-electron-mobility transistors on InP is one important aspect of achieving devices capable of operating beyond 300 GHz. In this article, we compare dc and rf performance results from two variations of one such device design, incorporating a composite-channel structure comprised of InAs clad by InP-lattice-matched InGaAs. The only difference between these two variations is the thickness of the bottom InGaAs cladding layer. The thicker gave extremely high performance, with current-gain-cutoff frequency (fT) exceeding 500 GHz, enabled by room-temperature channel-electron Hall mobility (mue) as high as 15,400 cm2/V/s and dc transconductance (gm) exceeding 2700 mS/mm; but it also incurred significant impact ionization. The thinner incurred less of this short-channel effect and yet gave very high performance, with fT exceeding 440 GHz, enabled by mue as high as 14,800 cm2/V/s and gm exceeding 2200 mS/mm, initially indicating that such a tradeoff might be the more overall beneficial. However, from a subsequent process iteration, in which the gate-recess etch was deepened for reduced short-channel effects, both of these same composite-channel design variations gave even better performance results. In that process iteration, the thicker variation not only achieved fT exceeding 500 GHz, but also achieved the recently-published new record maximum frequency of oscillation (fMAX) exceeding 1 THz. Therefore, the thicker bottom InGaAs cladding layer has indeed proven to be the more optimal composite-channel design variation for performance beyond 300 GHz.