Linus Feiten

Improving RO-PUF quality on FPGAs by incorporating design-dependent frequency biases

Physically unclonable functions (PUFs) based on ring oscillators (ROs) are a popular primitive in hardware security, meant to enable the unambiguous and tamper-proof identification of computer chips. This is achieved by exploiting different signal delays on each chip stemming from uncontrollable variations during the manufacturing process. Thus, the relation between RO frequencies on an individual chip can be used as the chips unique PUF signature. In this work, we show how ROs implemented on a larger number of Altera Cyclone IV FPGAs are biased towards slower or faster frequencies in non-uniform ways depending on the FPGAs programming with different design; even though the ROs are placed and routed equally. Without considering these biases, inter-device uniqueness of the PUF signatures is degraded. We demonstrate that subtracting the mean frequency of each RO - derived using only a small training set of devices - from the sampled frequencies overcomes this disadvantage; i.e. the uniqueness is increased drastically while maintaining reliability.

Implementation and Analysis of Ring Oscillator PUFs on 60 nm Altera Cyclone FPGAs

ABSTRACT Ring Oscillator (RO) physically unclonable functions (PUFs) on field programmable gate arrays (FPGAs) have drawn much attention in recent years. Making each FPGA uniquely identifiable, they allow for protection of intellectual property (IP) or generation of secret encryption keys. Their implementation has been widely discussed, but most experiments have been conducted on Xilinx platforms. In this paper, we report the statistical results from an analysis spanning 20 Cyclone IV FPGAs with 60 nm technology. We parameterize the RO length, placement, ambient temperature, and non-PUF switching activity and discuss the observed effects on PUF quality.

#SAT-based vulnerability analysis of security components — A case study

In this paper we describe a new approach to assess a circuits vulnerability to fault attacks. This is achieved through analysis of the circuits design specification, making use of modern SAT solving techniques. For each injectable fault, a corresponding SAT instance is generated. Every satisfying solution for such an instance is equivalent to a circuit state and an input assignment for which the fault affects the circuits outputs such that the error is not detected by the embedded fault detection. The number of solutions is precisely calculated by a #SAT solver and can be translated into an exact vulnerability measure. We demonstrate the applicability of this method for design space exploration by giving detailed results for various implementations of a deterministic random bit generator.

Sensitized path PUF: A lightweight embedded physical unclonable function

Physical unclonable functions (PUFs) can be used for a number of security applications, including secure on-chip generation of secret keys. We introduce an embedded PUF concept called sensitized path PUF (SP-PUF) that is based on extracting entropy out of inherent timing variability of modules already present in the circuit. The new PUF sensitizes paths of nearly identical lengths and generates response bits by racing transitions through different paths against each other. SP-PUF has lower area overhead and higher speed than earlier embedded PUFs and requires no helper data stored in non-volatile memory beyond standard error-correction information for fuzzy extraction. Compared with standalone PUFs, the new solution intrinsically and inseparably intertwines PUF behavior with functional circuitry, thus complicating invasive attacks or simplifying their detection. We present a systematic design flow to turn an arbitrary (sufficiently complex) circuit into an SP-PUF. The flow leverages state-of-the-art sensitization algorithms, formal filtering based on statistical analysis, and MaxSAT-based optimization of SP-PUFs area overhead. Experiments show that SP-PUF extracts 256-bit keys with perfect reliability and nearly perfect uniqueness after fuzzy extraction for the majority of standard benchmark circuits.

Das TV-Duell und die Landtagswahl in Schleswig-Holstein: Das Debat-O-Meter als neues Instrument der politischen Kommunikationsforschung

TV-Duelle zwischen Spitzenkandidaten politischer Parteien um Spitzenämter sind das mediale Großereignis eines jeden Wahlkampfes, so auch bei Landtagswahlen . Dabei standen die drei Landtagswahlen des ersten Halbjahres 2017 besonders unter dem Vorzeichen der Bundestagswahl am 24 . September dieses Jahres, obwohl die agierenden Spitzenpolitiker – wie etwa Hannelore Kraft oder Annegret Kramp-Karrenbauer – der eigenen Aussage nach dies gar nicht wollten, sondern versuchten, die Landespolitik in den Mittelpunkt ihrer Wahlkämpfe zu stellen . Für verschiedene Akteure der Landespolitik haben TV-Debatten aus ganz unterschiedlichen Gründen eine herausragende Bedeutung: Für Politiker und Wahlkämpfer liegt der besondere Reiz in der großen Reichweite . Vor Hundertausenden Zuschauern können die Spitzenpolitiker auf unmittelbare Weise Positionen beziehen und zentrale Argumente unter weitgehender Meidung medialer Selektionskriterien vortragen . Für die Medien sind TV-Duelle deshalb besonders attraktiv, weil sie leicht kommunizierbar sind, einen hohen Unterhaltungscharakter aufweisen sowie dem Trend von Personalisierung und Mediatisierung von Wahlberichterstattung entsprechen .1 Für Wählerinnen und Wähler bieten TV-Duelle eine sehr gute Gelegenheit, das politische Spitzenpersonal der für die Besetzung des Amtes des Regierungschefs relevanten Parteien direkt miteinander zu vergleichen und deren Programme gegenüberzustellen . TV-Duelle eröffnen der Wählerschaft damit ein attraktives Angebot der Wahlinformation und politischen Bildung zur häufig weniger beachteten Landespolitik . Und auch für die Kommunikationsund Politikwissenschaft sind sie ein reizvolles Forschungsfeld: Spätestens seit ihrer Etablierung als zentrales Ereignis des Medienwahlkampfes zur Bundestagswahl 2002 hat sich die Wissenschaft intensiv mit den Inhalten, Wahrnehmungsprozessen und Wirkungsmechanismen von TV-Duellen auf deren Rezipienten befasst . In der Landespolitik gehören diese Duelle bereits seit der Hamburger Bürgerschaftswahl 1997 zum medialen Repertoire; seitdem sind sie fester Bestandteil der Landtagswahlkämpfe in der Bundesrepublik . Der vorliegende Beitrag präsentiert die erste auf einer großen Fallzahl basierende Echtzeitanalyse (RTR-Messung = Real Time Response) einer politischen Debatte in Deutschland, die nicht unter Laborbedingungen durchgeführt wurde .2 Die Daten hierfür wurden

Formal Vulnerability Analysis of Security Components

Vulnerability to malicious fault attacks is an emerging concern for hardware circuits that are employed in mobile and embedded systems and process sensitive data. We describe a new methodology to assess the vulnerability of a circuit to such attacks, taking into account built-in protection mechanisms. Our method is based on accurate modeling of fault effects and detection status expressed by Boolean satisfiability (SAT) formulas. Vulnerability is quantified based on the number of solutions of these formulas, which are determined by an efficient #SAT solver. We demonstrate the applicability of this method for design space exploration of a pseudo random number generator and for calculating the attack success rate in a multiplier circuit protected by robust error-detecting codes.

Assessment of Shape Changes of Mistletoe Berries: A New Software Approach to Automatize the Parameterization of Path Curve Shaped Contours

Photographs of mistletoe (Viscum album L.) berries taken by a permanently fixed camera during their development in autumn were subjected to an outline shape analysis by fitting path curves using a mathematical algorithm from projective geometry. During growth and maturation processes the shape of mistletoe berries can be described by a set of such path curves, making it possible to extract changes of shape using one parameter called Lambda. Lambda describes the outline shape of a path curve. Here we present methods and software to capture and measure these changes of form over time. The present paper describes the software used to automatize a number of tasks including contour recognition, optimization of fitting the contour via hill-climbing, derivation of the path curves, computation of Lambda and blinding the pictures for the operator. The validity of the program is demonstrated by results from three independent measurements showing circadian rhythm in mistletoe berries. The program is available as open source and will be applied in a project to analyze the chronobiology of shape in mistletoe berries and the buds of their host trees.

Implementation of Delay-Based PUFs on Altera FPGAs

This chapter focuses on the implementation of delay-based PUFs on Altera FPGAs. While there has been a manifold of publications on how to evaluate and refine PUFs, a thorough description of the required “handicrafts” enabling a novice to enter this exciting research field has so far been missing. The methods shared in this chapter are not just easily extractable from available standard documentation, but have been compiled by the authors over a long period of trials and consultations with the Altera user community. Designing a delay-based PUF on FPGAs requires fine-tuning which is often like diverting the automated design tools from their intended use. For example, the device-specific delays for the PUF response generation are generally gathered from circuitry looking redundant to the bitstream compiler. Therefore, the automatic reduction of such seemingly redundant circuitry must be prevented. The way the circuitry is placed and routed also has a major impact on delay characteristics, so it is necessary to customise this instead of letting the compiler do it automatically. The reader will be walked through all necessary steps by means of a running example enabling them to embark on further experiments on their own. Along the way, the architecture of Altera Cyclone FPGAs is explained and results from the authors’ own experimental studies are shared.

Revocable Anonymisation in Video Surveillance: A “Digital Cloak of Invisibility”

Video surveillance is an omnipresent phenomenon in today’s metropolitan life. Mainly intended to solve crimes, to prevent them by realtime-monitoring or simply as a deterrent, video surveillance has also become interesting in economical contexts; e.g. to create customer profiles and analyse patterns of their shopping behaviour. The extensive use of video surveillance is challenged by legal claims and societal norms like not putting everybody under generalised suspicion or not recording people without their consent. In this work we propose a technological solution to balance the positive and negative effects of video surveillance. With automatic image recognition algorithms on the rise, we suggest to use that technology to not just automatically identify people but blacken their images. This blackening is done with a cryptographic procedure allowing to revoke it with an appropriate key. Many of the legal and ethical objections to video surveillance could thereby be accommodated. In commercial scenarios, the operator of a customer profiling program could offer enticements for voluntarily renouncing one’s anonymity. Customers could e.g. wear a small infrared LED to signal their agreement to being tracked. After explaining the implementation details, this work outlines a multidisciplinary discussion incorporating an economic, ethical and legal viewpoint.

Systemic Frequency Biases in Ring Oscillator PUFs on FPGAs

Physically unclonable functions (PUFs) are an emerging primitive in hardware security, enabling the identification of computer-chips. A promising type particularly for FPGA implementations is the Ring Oscillator (RO) PUF, where signal delays-stemming from uncontrollable variations in the manufacturing process-are used as device-specific characteristics. Based on experimental results gathered with 38 identical Altera FPGAs, we show the existence of non-device-specific i.e., systemic RO frequency biases, traced back to (1) the internal routing within the ROs look-up tables, (2) the RO locations on the FPGAs, or (3) the non-PUF payload activity. As these biases are the same for all devices, the result is poor inter-device uniqueness and unreliable signatures under changing payloads. After characterizing these biases with a newly developed set of metrics, we suggest a method to overcome them: Using only a small sample of devices, the average bias over all devices for each RO is predicted and the relative differences caused by systemic biases are nullified. We demonstrate the viability of this method by determining the sufficient random sample sizes and showing that the inter-device uniqueness is drastically increased and the PUF signatures become reliable even under changing payload activities.