Lloyd A. Walls
IBM
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Publication
Featured researches published by Lloyd A. Walls.
electronic components and technology conference | 2017
Sungjun Chun; Jose A. Hejase; Junyan Tang; Jean Audet; Dale Becker; Daniel M. Dreps; Glen A. Wiedemeier; Megan Nguyen; Lloyd A. Walls; Francesco Preda; Daniel Douriet
A 19.2 Gb/s per lane link with IBMs latest POWER8 processor module has been analyzed. This paper presents the overview of the high-speed link design from the signal integrity point of view. Design approaches in package and printed circuit board (PCB) to support the target data-rate have been discussed. The end-to-end communication bus is modeled from extracted post-route design with a 3-D full-wave extractor and has been simulated with IO properties at system level. Bath-tub curves are generated from data gathered in functioning systems running this 19.2 Gb/s link to confirm the operation of the link meets the required bit-error-rate criteria as the modeling and simulation predicted.
electronic components and technology conference | 2014
Nam H. Pham; Faraydon Pakbaz; Zhenrong Jin; Lloyd A. Walls
This paper presents an effective design approach for the power supply filter of a phase lock loop (PLL) based clock generator in a multi-core ASIC. The noise sensitivity of different types, filter design, system design issues, and measurement techniques for verification and understanding of jitter behavior on power supply noise are discussed.
electrical performance of electronic packaging | 2014
Jose A. Hejase; Daniel M. Dreps; Lloyd A. Walls; Nam H. Pham; Rubina F. Ahmed; James D. Jordan
This paper presents a millimeter wave-guiding technique for passive frequency band splitting and combining. The devices which can be made possible as a result of implementing this technique have potential for use in high speed signaling systems for the purpose of facilitating the transmission of multiple carrier frequency signals through the same guiding structure. The device splitting operation causes minor signal attenuation or power loss in the split frequency bands and is based upon modal waveguide design principles.
electronic components and technology conference | 2013
Jose A. Hejase; Nanju Na; Nam H. Pham; Lloyd A. Walls
This study presents a dielectric waveguide via design. The design serves two purposes. First, it removes the need for DC-blocking capacitors within a high speed signaling system. This is because it is free of conductors and made of dielectric materials thus inherently accomplishing DC-blocking on a signal travel route. Second, it allows for efficient via performance at millimeter wave frequencies which is harder to achieve using traditional metallic via designs. The design uses quasi-optical principles in order to make the transit between one PCB layer trace to another possible. This study presents the design guidelines for such a via along with simulations showing operation and evaluating performance.
Archive | 1995
Lloyd A. Walls
Archive | 1996
Tai Cao; Satyajit Dutta; Thai Quoc Nguyen; Thanh D. Trinh; Lloyd A. Walls
Archive | 1995
Tai Cao; Satyajit Dutta; Thai Quoc Nguyen; Thanh D. Trinh; Lloyd A. Walls
Archive | 1994
Tai A. Cao; Herbert I. Stoller; Thanh D. Trinh; Lloyd A. Walls
Archive | 1994
Tai A. Cao; Satyajit Dutta; Thai Quoc Nguyen; Thanh D. Trinh; Lloyd A. Walls
Archive | 1995
Byron Krauter; Peter Juergen Klim; Tak H. Ning; Stanley E. Schuster; Lloyd A. Walls